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AMD Zen 2 (Ryzen 3000) - *** NO COMPETITOR HINTING ***

Soldato
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If it has changed they've kept it quiet, i can't see it myself but something must be causing TDP numbers to be all out of whack in relation to core counts and frequencies.
 
Associate
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If it has changed they've kept it quiet, i can't see it myself but something must be causing TDP numbers to be all out of whack in relation to core counts and frequencies.

Yeah, it's nothing I have seen officially (nor do I really expect them to explain their marketing BS), but there's no other explanation for it.

Even assuming the 3950X chiplets are better binned, you still have more of each one enabled, which should logically increase the TDP. There's more to it than just better binning on this one.
 
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I wish there was way to calculate effective latency with this chonking cache though, raw latency seems to be misleading.
Yup.
By my calculations 3rd gen Ryzen would need to be going to memory 36-40% less often as a result of the doubled L3 in order to bring effective latency down to being on a par with 9th gen Intel. IIRC, the initial indications are 10ns to L3 and 67ns to memory, versus 10ns to L3 and 47ns to memory with Intel.
 
Soldato
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Yup.
By my calculations 3rd gen Ryzen would need to be going to memory 36-40% less often as a result of the doubled L3 in order to bring effective latency down to being on a par with 9th gen Intel. IIRC, the initial indications are 10ns to L3 and 67ns to memory, versus 10ns to L3 and 47ns to memory with Intel.

Where do you get your "initial indications" from ? Even Zen+ get's better latency than 10ns to L3 and 67ns to Memory and that's with Memory at 3533Mhz. Zen 2's sweet spot is supposed to be 3733Mhz.
o6w8bt.jpg


I would expect Zen 2 Memory to be 58/59ns and L3 8/9ns
 
Soldato
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Yup.
By my calculations 3rd gen Ryzen would need to be going to memory 36-40% less often as a result of the doubled L3 in order to bring effective latency down to being on a par with 9th gen Intel. IIRC, the initial indications are 10ns to L3 and 67ns to memory, versus 10ns to L3 and 47ns to memory with Intel.

I'm interested to see what if anything the extra L3 on the 3900X does Vs the 3800X.
 
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Where do you get your "initial indications" from ? Even Zen+ get's better latency than 10ns to L3 and 67ns to Memory and that's with Memory at 3533Mhz. Zen 2's sweet spot is supposed to be 3733Mhz.
o6w8bt.jpg


I would expect Zen 2 Memory to be 58/59ns and L3 8/9ns
They were taken from various other benchmarks where a common theme of 67ns was showing up, which for the most part has been consistent with what Zen+ was offering.
Regarding the L3 figure, I vaguely remember seeing an earlier AIDA benchmark for Zen 2 being at 10ns, though it matters little because I've assumed exactly the same figure for Intel.
Perhaps I should have been more clear with that, all L1/2/3 being equal latency, Zen 2 having double L3 cache would need to go to memory 36-40% less often with 67ns memory latency (or 25% less often with 59ns) for effective memory latency to be the same as 9th gen Intel.
 
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Soldato
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Math is not my strong point but we know the increase in L3 has increased it's latency from 35 cycles to 40, latency is a tricky thing to measure though as it depends on where the two points you're measuring from are and if you're just measuring first word access times, trying to work it out on paper gives me headaches.
 
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The real take home is the headline memory latency number means very little; Zen 2 will require fewer trips to memory due to it's design. Fewer trips to memory equates to lower real world latency. Lower real world latency equates to better real world performance.
What matters is how much the increase in L3 cache reduces the trips required to memory. It'll vary by workload, clearly.
My instinct tells me that node shrinks with next generations might be taken up by larger L3 rather than extra cores; they already take up around 50% of die space.
 
Soldato
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The real take home is the headline memory latency number means very little; Zen 2 will require fewer trips to memory due to it's design. Fewer trips to memory equates to lower real world latency. Lower real world latency equates to better real world performance.
What matters is how much the increase in L3 cache reduces the trips required to memory. It'll vary by workload, clearly.
My instinct tells me that node shrinks with next generations might be taken up by larger L3 rather than extra cores; they already take up around 50% of die space.

Oh i fully agree. The fewer trips to memory, the better all round for a wide variety of workloads particularly gaming. That's why Lisa Su emphasized gaming in her presentation.
 
Soldato
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Is it possible/likely that the b550 and x570 will be the only chipsets available this year to support future AMD processors like Zen 3 in 2020?
 
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Soldato
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so far I have only ever had Asus or gigabyte motherboards, but what about MSI gaming carbon pro - aren't they meant to have good vrms and power delivery?
While using old separate high and low side FETs+drivers design they're certainly decent.
B450 Carbon beats half the Asus/Gigabyte boards with proper four phases.
Plus includes BIOS flashback without CPU/memory/GPU.

And X470 Carbon rises number of phases from four to five, though there's that IO cover marketing BS excrement to decrease VRM cooling.
So VRM temps might actually not be that much better, but extra phase should improve output ripple/voltage regulation.
Though compared to X570 that's likely going to be very low end level and good amount better and beefier VRMs exist in current board.
 
Soldato
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TDP and power consumption are two different things. 3900X will probably consume more power even though both have a 105 TDP.
Thermodynamics, which if we had wrong would make most machinery not work, tells this:
Energy can't disappear, or appear from nowhere. It can only change form.

That means heat output equals to electric power consumption.
Intel's gross lying/misleading in TDP to hide full load power consumption at hyped speed is entirely different thing.

Though of course if Zen2s run at lower voltage, that increases current draw making them harder load per watt.
Anyway better VRMs like six phase IR3555 should have plenty enough reserve for higher current.
 
Soldato
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The last two bits won't add £400 to the cost of a motherboard especially if they are using a cheaper Ethernet chip.

It cannot be chipset pricing either as we are having sub £200 X570 motherboards too.

Asus are testing the market to see if they can get enough people to buy the Titan equivalent of a motherboard.
Yes, but what does that have to do with the Crosshair VIII Hero? Just because Asus are slapping on a few more components and charging a fortune doesn't mean the tier below will be just as expensive, and it doesn't mean it'll be much more affordable. We don't know yet.
 
Soldato
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That confuses me, why is the intel chip at 3.6, surely those things can do 5? Which should give it about 40% more perf?
Intel confuses people because they put the "@ 3.6 GHz" in the ID string of the CPU itself. It does not mean the CPU is running at that base frequency, because in almost all cases it will actually be running at its boost clocks (e.g. 5.0 GHz for i9-9900K on a single core at stock).

Its just what the software is reading, its reading the base frequency from the CPU's firmware data.

An interesting thing to note, all the Ryzen CPU's do not have a frequency reading.
No, the software isn't "reading" any frequency from any "firmware" at all.
 
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