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Patent 7,315,190
The present invention discloses a PWM integrated circuit which may receive a programming signal without any extra pin. The PWM integrated circuit comprises: a comparator having two outputs; two pins respectively electrically connected with the two outputs; and a programming unit electrically connected with at least one of the two pins for setting a parameter inside the PWM integrated circuit. The two pins of the PWM integrated circuit may be used to respectively control a control switch and a synchronous switch, constituting a PWM circuit for generating PWM signals.
Patent 6,414,470
An apparatus and method for current balance in a multi-phase DC-to-DC converter with a converter output voltage and a plurality of channel currents employs for each channel a multi-input pulse width modulator or an ordinary pulse width modulator in conjunction with a multi-input comparator to produce a respective PWM signal to regulate the corresponding channel current. In addition to the comparison of the converter output voltage with a reference signal to produce an error signal, the apparatus and method compares the error signal with a ramp signal and the corresponding channel current with each of the other channel currents with the multi-input pulse width modulator. Alternatively, a ramp signal is compared by the ordinary pulse width modulator with a signal derived from the multi-input comparator which subtracts the corresponding channel current from each other channel current and sums the error signal.
Patent 7,132,717
A power metal oxide semiconductor transistor layout is disclosed. The power metal oxide semiconductor transistor layout uses network of conductive lead line as a connection or a network connection to connect source and drain regions thereby achieves advantages of a high uniformity of current, low Rds_on, much less power loss, an actual line density two times larger than that of conventional layouts and a strengthened resistance to electron migration.
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