For those of you having problems with getting a 790i board stable.
P1 - [Auto, Enabled] We can tell you this setting optimizes internal MCH latencies when setting an FSB of 475MHz or greater, but the exact functionality is unknown at this time. Enable this option when overclocking above 475FSB to gain back some memory read performance and improve memory access latencies. Below 475FSB, this option has no effect (Auto maps to Enabled by default). You may need to increase NB Core Voltage (SPP Voltage) when this setting is Enabled.
P2 - [Auto, Enabled] This setting should also be Enabled if possible when clocking above 475FSB. Typically, you will have problems with "P2" if your system in unstable with "P1" Enabled. Enabling both "P1" and "P2" will result in the greatest memory read performance improvement.
tCL (CAS Latency) - [Auto, 5 ~ 18] As a rule of thumb, use 6 below DDR3-1600, 7 from DDR3-1600 to about DDR3-1830, 8 from DDR3-1830 to about DDR-2000 and 9 for anything above DDR3-2000. Not all memory is the same so you will need to experiment to see what works best. Besides the actual memory speed, the selection of this value has one of the greatest impacts on the memory voltage required for stable operation (lower values leads to higher voltages).
tRCD (RAS to CAS Delay) - [Auto, 1 ~ 15] You cannot go wrong setting this to the same value as tCL. Sometimes you can set this to tCL -1 without the need for any additional voltage; just do not expect a big change in memory read bandwidth.
tRP (Row Precharge) - [Auto, 1 ~ 15] Like tRCD, set this to the same value as tCL or use tCL -1. Typically, if memory will handle a tRCD of tCL -1 then you may be able to get away with tRCD -1 one for tRP. Again, try different values and go with the lowest number you can get away with without the need for excessive memory voltage.
tRAS (Active to Precharge Delay) - [Auto, 1 ~ 63] Never set a tRAS lower than tRCD + tCL + 2. Contrary to popular belief, tRAS is not as much an actual timing as it is a minimum cycle time. Lower values are almost guaranteed not to improve memory performance but stability can go south in a hurry if you are too aggressive with this timing.
Command Per Clock - [Auto, 1 clock, 2 clock] Generally speaking, 1T command timing should be good up to about DDR3-1860 with 2GB of memory. Save yourself the hassle and use 2T whenever overclocking with 4GB or 8GB of DDR3.
tRRD (RAS to RAS Delay) - [Auto, 1 ~ 15] We recommend you set this value to 1 and leave it there.
tRC (Bank Cycle Time) - [Auto, 1 ~ 63] This is arguably one of the most important timings when it comes to memory performance with NVIDIA chipsets. The rule when it comes to tRC is you should set it no lower than tCL + tRAS + 2. Even small reductions in this timing can bring about large decreases in memory access latencies.
tWR (Write Recovery Time) - [Auto, 5, 6, 7, 8, 10, 12] Tighten this to 10 if you can. Some memory will go as low as 8 if you feed it enough voltage.
tWTR (Write to Read Delay) - [Auto, 1 ~ 31] This setting is best left on Auto.
tFAW (Four Active Window Delay) - [Auto, 1 ~ 63] Try setting this to whatever you use for tRC. Those that are overclocking 8GB of DDR3 may need to loosen this significantly above DDR3-1600 or so.
tRD (Read Delay) - [Auto, 1 ~ 15] This timings was added at our bequest starting with BIOS 0504. Unfortunately, the chipset does not respond to this option in the manner in which an Intel chipset would. For now, ignore this timing as if it did not exist (leave on Auto).
tRTP (Read to Precharge Delay) - [Auto, 1 ~ 15] This setting is best left on Auto.
tRFC (Row Refresh Cycle Time) - [Auto (0), Manual to 255] Set a tRFC of at least 72 when clocking 8GB of DDR3 above DDR3-1600. Otherwise, the board handles adjusting this option automatically quite well. A small amount of memory read performance can sometimes be gained with moderately lower values. Go too far though and you will be greeted with a BSOD during OS load.
tREF (Refresh Period) - [Auto, 3.9, 7.8] Leave this on Auto as the correct value is read from your modules SPD (typically 7.8μS).
Over Voltage
CPU Voltage - [Auto, 1.10000 ~ 2.40000 in 0.00625 steps] This setting controls the processor supply voltage by manually adjusting the target CPU VID.
Our measurements have shown the ASUS Striker II Extreme to have a nominal load line impedance (RLL) of approximately 0.80mΩ meaning that for each ampere (A) drawn by the processor the regulated supply voltage will droop 0.8mV. Given this, a 45nm quad-core QX9650 CPU with a full-load power consumption of 80W should draw about 65A, resulting in a total drop of around 0.05V from idle to full-load.
Loadline Calibration - [Enabled, Disabled] Setting Enabled will effectively remove any negative feedback in the CPU supply voltage regulation circuit. This means that there will be little to no difference between the CPU supply voltage at idle and full-load. This does not mean however that there will be no offset seen between the idle voltage and the CPU Voltage VID as selected in BIOS. Disabled follows the Intel specification and allows the CPU supply voltage to droop under load as properly designed. We recommend you leave this Disabled and increase CPU Voltage as needed to satisfy the minimum operating voltage needed under load.
CPU PLL Voltage - [Auto, 1.50 ~ 3.00 in 0.02 steps] Selecting a higher PLL (phase lock-loop) voltage may help the installed CPU clock higher or may assist with maintaining stability when operating at higher FSB speeds. Most users will find they do not need to set this to anything above 1.50. Exercise caution when experimenting with higher values as there have been reported cases of CPUs losing cores after being subjected to voltages in excess of about 2.00V.
CPU VTT Voltage - [Auto, 1.20 ~ 2.46 in 0.02 steps] VTT is the termination voltage for data lines used to interface the MCH with the CPU die(s) via the Front Side Bus. Higher values can provide additional FSB overclocking margin, especially with 45nm dual-core processors and quad-cores CPUs in general. We have never found any additional gains to be had above 1.36 when using air- or water-cooling. Setting Auto should default to 1.10V for 45nm CPUs and 1.20V for 65nm CPUs. Knowing this, there appears to be a dead band between 1.10V and 1.20V where intermediate values cannot be selected - we are working with ASUS engineering to get this corrected.
Memory Voltage - [Auto, 1.50 ~ 3.10 in 0.02 steps] DDR3 memory is rated for standard operation at just 1.5V with most performance memory kits specifying the use of voltages between 1.75V and 1.95V inclusive. Increasing the memory voltage will have a direct impact on the ability to run the installed memory at higher frequencies, with tighter timings, or both. This voltage will droop slightly under load, so consider this when selecting the appropriate value. Our recommendation is never to exceed the manufacturer's maximum warranted voltage. With that said, values in excess of about 2.30V with DDR3 are a death sentence.
NB Core Voltage - [Auto, 1.30 ~ 2.20 in 0.02 steps] This is the main power supply voltage for the 790i SPP. Any of the following adjustments may require an increase in this voltage: higher memory operating frequency, tighter memory timings, enabling P1 and/or P2, the use of additional memory modules (including higher-density modules), and increases in PCIe Slot 1/Slot 2 base link speeds. We were able to reach DDR3-2000 speeds (500FSB) using 4x2GB of OCZ DDR3 with only 1.52. This is near full load for this chipset, suggesting that higher voltages will only lead to additional heating and eventual instabilities.
SB Core Voltage - [Auto, 1.50 ~ 1.85 in 0.05 steps] This is the main power supply voltage for the 570 MCP. Leave this voltage set to 1.50 unless you increase PCIE Bus, Slot 3, MHz, LDT Frequency, and/or SPP<->MCP Ref Clock, MHz and find instabilities due to the change(s).
CPU GTL_REF(0~4) Ratio - [Auto, Default, -226mV ~ +224mV] Gunning Transceiver Logic (GTL) voltages are nothing more than reference thresholds used by the CPU and SPP (MCH) in determining if the voltage potential on a FSB data or address signal line is intended to represent either a logic level 1 (high) or logical level 0 (low). These voltages are generated by the motherboard, usually though the use of precision voltage dividers or high-accuracy, programmable digital potentiometers. Although the most common way to specify these values is as a percentage (or ratio) of full scale CPU VTT Voltage, NVIDIA has decided to provide these settings as simple offsets meaning a little math will be involved if you want to make a change.
These reference values are particularly important when overclocking quad-core CPUs, especially when venturing above about 475MHz FSB. The ability to tune these values per die can mean the difference between achieving a stable overclock at 475FSB and one at 500FSB. The real power seen in GTL reference tuning comes in the ability to provide each quad-core die with separate reference values. (Recall that current quad-cores from Intel are an MCM design consisting of two dual-core dies on a single substrate package.)
This can get tricky though as each die receives two GTL reference voltages - one for the FSB Data Bus (running at the full FSB transfer rate) and one for the FSB Address Bus (running at half the FSB transfer rate). This means CPU GTL_REF0 Ratio is for the Core 0/1 Data Bus, CPU GTL_REF1 Ratio is for the Core 2/3 Data Bus, CPU GTL_REF2 Ratio is for the Core 0/1 Address Bus, and CPU GTL_REF3 Ratio is for the Core2/3 Address Bus. CPU GTL_REF2 Ratio and CPU GTL_REF3 Ratio will have no affect with a dual-core CPU installed, in which case CPU GTL_REF0 Ratio is for the Core 0/1 Data Bus and CPU GTL_REF1 Ratio is for the Core 0/1 Address Bus. As a rule, adjustments are normally made to FSB Data Bus values first. These lines are consistently heavily loaded and as such are more susceptible to the detrimental effects of reduced signaling margins.
Intel's GTL specification dictates that each reference voltage should be tightly controlled as 67% of the current VTT voltage (0.67 times CPU VTT Voltage). Typically, changes in VTT are automatically compensated with standard voltage divider circuits dedicated to the generation of each GTL reference voltage. Historical data has shown that dual-core CPUs (in particular 45nm dual-cores) often clock to higher FSB levels when the GTL reference values are closer to 63 ~ 64% of VTT while quad-core CPUs usually need the full strength value or even a little more voltage (67 ~ 70% of VTT).
As an exercise in the application of basic math, consider the following. With VTT at 1.10V, the GTL reference voltages at 67% would be 0.737V (0.67 times 1.10V). If VTT increased to 1.26V, the new GTL reference voltage would be 0.844V, calculated the same as before. If we wanted to adjust this down to 63%, we would simply multiply the current VTT voltage by the difference between the actual and desired percentages of full scale VTT (67% minus 63% equals 4% or 0.04) and then convert this to mV by multiplying by 1000. At 1.26V, the result would be 50mV and since we want to reduce the GTL reference voltage we would pick the value closest to -50mV. Sometimes tweaking VTT slightly up or down can help if none of the available values is close enough the desired offset. Of course, you will need to repeat the calculation using the new VTT.
Proper GTL reference level tuning can sometimes allow for a dramatic reduction in VTT and in some severe cases even permits the use of a lower core supply voltage (Vcore). The most recent x64 build of Prime95, version 25.6 build 6, provides an excellent means for testing the effectiveness of CPU-specific GTL tuning. Simply load the program, select the Blend type Torture Test, and watch for any instance to drop out. Note the instance number (which will correlate to the core in question), reset and enter the BIOS, make a small adjustment to the corresponding GTL reference value(s), and then start a new test run. If the test runs for a longer period of time then you can be confident that you are at least moving in the right direction. Continue this process until the system is sufficiently stable with the current settings.
Those that want to know more about GTL reference voltages and related tuning issues are encouraged to carefully examine more in-depth articles on the subject posted here and here.
NB GTL_REF Ratio - [Auto, Default, -126mV ~ +160mV] The NB (SPP) GTL reference voltage provides the same functionality as those for the CPU, the only difference being that the Northbridge uses only a single value. Tuning in the right GTL reference voltage (usually near the nominal 67% value) can sometimes lead to lower stable VDIMM requirements.
DDR3 CHA(1~2)/CHB(1~2) Ref Voltage - [Auto, Default, -126mV ~ +160mV] These voltages work like GTL references for memory, except that VTT for the memory is defined as one-half VDIMM. Small adjustments in either direction can sometimes bring additional stability or higher memory overclocks; however, testing the effectiveness of any change is exceedingly difficult and time consuming. Most of the time these are better off simply left on Auto.
CPU Configuration
CPU Internal Thermal Control - [Auto, Disabled] Always leave this on Auto as disabling internal thermal control can have unknown affects on system operation. According to sources at Intel, thermal control is required to be active if the CPU is expected to correctly function within specifications.
Limit CPUID MaxVal - [Enabled, Disabled] Some legacy operating systems (i.e. Windows NT SP2 and older) are unable to properly deal with the CPUID x86 opcode when called using operands greater than 3. The problem is that the boot code for these older system was written to query the CPU for the highest supported value and then to call a routine using this value. Unfortunately, the programmers did not have the foresight to account for future processors with higher values and the OS crashes with a BSOD due to the unhandled exception in a routine running with kernel mode privileges.
The result is a general incompatibility between these newer CPUs (with a maximum supported CPUID value of 4) and these older operating systems. Set this to Enabled if you experience just such a problem, otherwise leave this Disabled. Beware that improperly enabling this setting with Windows 2000, XP, or any flavor of Vista can cause serious performance problems.
Enhanced C1 (C1E) - [Enabled, Disabled] C1E functions to reduce the CPU multiplier to 6.0x when idling or running in load-load conditions. This can sometimes provide a small degree of power savings, especially if the system is highly overclocked to begin with. Most users find the constant switching between the idle and load frequencies annoying, besides which a small performance penalty is experienced during each transition. We usually disable this setting and recommend you do the same if you are building your system for gaming purposes.
Execute Disable Bit - [Enabled, Disabled] The Execute Disable (NX) Bit is typically used as a form of hardware protection against the execution of malicious code. This bit is part of the page table descriptor used to mark the memory page table as executable or not. This way programs that purposefully cause buffer overflows that end up spilling into the memory address space of other processes cannot execute injected data unless the page is specifically marked as containing executable code. Enabling this feature will force Physical Address Extension (PAE) Mode when running a 32-bit Windows OS regardless of the amount of system memory installed. This is because the NX bit resides at bit 63 of the page table entry and page table entries are only 32 bits in length with PAE disabled. 64-bit operating systems always run in PAE Mode. Enabling this feature has never negatively affected our ability to overclock.
Virtualization Technology - [Enabled, Disabled] This setting controls whether or not the BIOS masks requests sent to the CPU in determining whether or not Virtualization Technology (VT) is supported. Disabling this setting ensures the system cannot run any code pertaining to system virtualization. We usually leave this Disabled unless we have a good reason to enable it.
Enhanced Intel SpeedStep™ Tech. - [Enabled, Disabled] Although some BIOS releases may allows this features to be alternately Disabled or Enabled, it has no affect unless the installed CPU is capable of conducting power state transitions and no desktop chipset contains this feature set (yet). This option should be grayed out unless you have some special CPU have not encountered.
CPU Core 2/3/4 - [Enabled, Disabled] This setting merely controls a mask used by the BIOS in determining which cores are advertised as available for use by the host systems. Disabling cores can sometimes allow a quad-core CPU to function more like a dual-core CPU when it comes to FSB clocking. Numbering the cores from 1 is a mistake in our opinion; this option should really read "CPU Core 1/2/3".
Nvidia.
P1 - [Auto, Enabled] We can tell you this setting optimizes internal MCH latencies when setting an FSB of 475MHz or greater, but the exact functionality is unknown at this time. Enable this option when overclocking above 475FSB to gain back some memory read performance and improve memory access latencies. Below 475FSB, this option has no effect (Auto maps to Enabled by default). You may need to increase NB Core Voltage (SPP Voltage) when this setting is Enabled.
P2 - [Auto, Enabled] This setting should also be Enabled if possible when clocking above 475FSB. Typically, you will have problems with "P2" if your system in unstable with "P1" Enabled. Enabling both "P1" and "P2" will result in the greatest memory read performance improvement.
tCL (CAS Latency) - [Auto, 5 ~ 18] As a rule of thumb, use 6 below DDR3-1600, 7 from DDR3-1600 to about DDR3-1830, 8 from DDR3-1830 to about DDR-2000 and 9 for anything above DDR3-2000. Not all memory is the same so you will need to experiment to see what works best. Besides the actual memory speed, the selection of this value has one of the greatest impacts on the memory voltage required for stable operation (lower values leads to higher voltages).
tRCD (RAS to CAS Delay) - [Auto, 1 ~ 15] You cannot go wrong setting this to the same value as tCL. Sometimes you can set this to tCL -1 without the need for any additional voltage; just do not expect a big change in memory read bandwidth.
tRP (Row Precharge) - [Auto, 1 ~ 15] Like tRCD, set this to the same value as tCL or use tCL -1. Typically, if memory will handle a tRCD of tCL -1 then you may be able to get away with tRCD -1 one for tRP. Again, try different values and go with the lowest number you can get away with without the need for excessive memory voltage.
tRAS (Active to Precharge Delay) - [Auto, 1 ~ 63] Never set a tRAS lower than tRCD + tCL + 2. Contrary to popular belief, tRAS is not as much an actual timing as it is a minimum cycle time. Lower values are almost guaranteed not to improve memory performance but stability can go south in a hurry if you are too aggressive with this timing.
Command Per Clock - [Auto, 1 clock, 2 clock] Generally speaking, 1T command timing should be good up to about DDR3-1860 with 2GB of memory. Save yourself the hassle and use 2T whenever overclocking with 4GB or 8GB of DDR3.
tRRD (RAS to RAS Delay) - [Auto, 1 ~ 15] We recommend you set this value to 1 and leave it there.
tRC (Bank Cycle Time) - [Auto, 1 ~ 63] This is arguably one of the most important timings when it comes to memory performance with NVIDIA chipsets. The rule when it comes to tRC is you should set it no lower than tCL + tRAS + 2. Even small reductions in this timing can bring about large decreases in memory access latencies.
tWR (Write Recovery Time) - [Auto, 5, 6, 7, 8, 10, 12] Tighten this to 10 if you can. Some memory will go as low as 8 if you feed it enough voltage.
tWTR (Write to Read Delay) - [Auto, 1 ~ 31] This setting is best left on Auto.
tFAW (Four Active Window Delay) - [Auto, 1 ~ 63] Try setting this to whatever you use for tRC. Those that are overclocking 8GB of DDR3 may need to loosen this significantly above DDR3-1600 or so.
tRD (Read Delay) - [Auto, 1 ~ 15] This timings was added at our bequest starting with BIOS 0504. Unfortunately, the chipset does not respond to this option in the manner in which an Intel chipset would. For now, ignore this timing as if it did not exist (leave on Auto).
tRTP (Read to Precharge Delay) - [Auto, 1 ~ 15] This setting is best left on Auto.
tRFC (Row Refresh Cycle Time) - [Auto (0), Manual to 255] Set a tRFC of at least 72 when clocking 8GB of DDR3 above DDR3-1600. Otherwise, the board handles adjusting this option automatically quite well. A small amount of memory read performance can sometimes be gained with moderately lower values. Go too far though and you will be greeted with a BSOD during OS load.
tREF (Refresh Period) - [Auto, 3.9, 7.8] Leave this on Auto as the correct value is read from your modules SPD (typically 7.8μS).
Over Voltage
CPU Voltage - [Auto, 1.10000 ~ 2.40000 in 0.00625 steps] This setting controls the processor supply voltage by manually adjusting the target CPU VID.
Our measurements have shown the ASUS Striker II Extreme to have a nominal load line impedance (RLL) of approximately 0.80mΩ meaning that for each ampere (A) drawn by the processor the regulated supply voltage will droop 0.8mV. Given this, a 45nm quad-core QX9650 CPU with a full-load power consumption of 80W should draw about 65A, resulting in a total drop of around 0.05V from idle to full-load.
Loadline Calibration - [Enabled, Disabled] Setting Enabled will effectively remove any negative feedback in the CPU supply voltage regulation circuit. This means that there will be little to no difference between the CPU supply voltage at idle and full-load. This does not mean however that there will be no offset seen between the idle voltage and the CPU Voltage VID as selected in BIOS. Disabled follows the Intel specification and allows the CPU supply voltage to droop under load as properly designed. We recommend you leave this Disabled and increase CPU Voltage as needed to satisfy the minimum operating voltage needed under load.
CPU PLL Voltage - [Auto, 1.50 ~ 3.00 in 0.02 steps] Selecting a higher PLL (phase lock-loop) voltage may help the installed CPU clock higher or may assist with maintaining stability when operating at higher FSB speeds. Most users will find they do not need to set this to anything above 1.50. Exercise caution when experimenting with higher values as there have been reported cases of CPUs losing cores after being subjected to voltages in excess of about 2.00V.
CPU VTT Voltage - [Auto, 1.20 ~ 2.46 in 0.02 steps] VTT is the termination voltage for data lines used to interface the MCH with the CPU die(s) via the Front Side Bus. Higher values can provide additional FSB overclocking margin, especially with 45nm dual-core processors and quad-cores CPUs in general. We have never found any additional gains to be had above 1.36 when using air- or water-cooling. Setting Auto should default to 1.10V for 45nm CPUs and 1.20V for 65nm CPUs. Knowing this, there appears to be a dead band between 1.10V and 1.20V where intermediate values cannot be selected - we are working with ASUS engineering to get this corrected.
Memory Voltage - [Auto, 1.50 ~ 3.10 in 0.02 steps] DDR3 memory is rated for standard operation at just 1.5V with most performance memory kits specifying the use of voltages between 1.75V and 1.95V inclusive. Increasing the memory voltage will have a direct impact on the ability to run the installed memory at higher frequencies, with tighter timings, or both. This voltage will droop slightly under load, so consider this when selecting the appropriate value. Our recommendation is never to exceed the manufacturer's maximum warranted voltage. With that said, values in excess of about 2.30V with DDR3 are a death sentence.
NB Core Voltage - [Auto, 1.30 ~ 2.20 in 0.02 steps] This is the main power supply voltage for the 790i SPP. Any of the following adjustments may require an increase in this voltage: higher memory operating frequency, tighter memory timings, enabling P1 and/or P2, the use of additional memory modules (including higher-density modules), and increases in PCIe Slot 1/Slot 2 base link speeds. We were able to reach DDR3-2000 speeds (500FSB) using 4x2GB of OCZ DDR3 with only 1.52. This is near full load for this chipset, suggesting that higher voltages will only lead to additional heating and eventual instabilities.
SB Core Voltage - [Auto, 1.50 ~ 1.85 in 0.05 steps] This is the main power supply voltage for the 570 MCP. Leave this voltage set to 1.50 unless you increase PCIE Bus, Slot 3, MHz, LDT Frequency, and/or SPP<->MCP Ref Clock, MHz and find instabilities due to the change(s).
CPU GTL_REF(0~4) Ratio - [Auto, Default, -226mV ~ +224mV] Gunning Transceiver Logic (GTL) voltages are nothing more than reference thresholds used by the CPU and SPP (MCH) in determining if the voltage potential on a FSB data or address signal line is intended to represent either a logic level 1 (high) or logical level 0 (low). These voltages are generated by the motherboard, usually though the use of precision voltage dividers or high-accuracy, programmable digital potentiometers. Although the most common way to specify these values is as a percentage (or ratio) of full scale CPU VTT Voltage, NVIDIA has decided to provide these settings as simple offsets meaning a little math will be involved if you want to make a change.
These reference values are particularly important when overclocking quad-core CPUs, especially when venturing above about 475MHz FSB. The ability to tune these values per die can mean the difference between achieving a stable overclock at 475FSB and one at 500FSB. The real power seen in GTL reference tuning comes in the ability to provide each quad-core die with separate reference values. (Recall that current quad-cores from Intel are an MCM design consisting of two dual-core dies on a single substrate package.)
This can get tricky though as each die receives two GTL reference voltages - one for the FSB Data Bus (running at the full FSB transfer rate) and one for the FSB Address Bus (running at half the FSB transfer rate). This means CPU GTL_REF0 Ratio is for the Core 0/1 Data Bus, CPU GTL_REF1 Ratio is for the Core 2/3 Data Bus, CPU GTL_REF2 Ratio is for the Core 0/1 Address Bus, and CPU GTL_REF3 Ratio is for the Core2/3 Address Bus. CPU GTL_REF2 Ratio and CPU GTL_REF3 Ratio will have no affect with a dual-core CPU installed, in which case CPU GTL_REF0 Ratio is for the Core 0/1 Data Bus and CPU GTL_REF1 Ratio is for the Core 0/1 Address Bus. As a rule, adjustments are normally made to FSB Data Bus values first. These lines are consistently heavily loaded and as such are more susceptible to the detrimental effects of reduced signaling margins.
Intel's GTL specification dictates that each reference voltage should be tightly controlled as 67% of the current VTT voltage (0.67 times CPU VTT Voltage). Typically, changes in VTT are automatically compensated with standard voltage divider circuits dedicated to the generation of each GTL reference voltage. Historical data has shown that dual-core CPUs (in particular 45nm dual-cores) often clock to higher FSB levels when the GTL reference values are closer to 63 ~ 64% of VTT while quad-core CPUs usually need the full strength value or even a little more voltage (67 ~ 70% of VTT).
As an exercise in the application of basic math, consider the following. With VTT at 1.10V, the GTL reference voltages at 67% would be 0.737V (0.67 times 1.10V). If VTT increased to 1.26V, the new GTL reference voltage would be 0.844V, calculated the same as before. If we wanted to adjust this down to 63%, we would simply multiply the current VTT voltage by the difference between the actual and desired percentages of full scale VTT (67% minus 63% equals 4% or 0.04) and then convert this to mV by multiplying by 1000. At 1.26V, the result would be 50mV and since we want to reduce the GTL reference voltage we would pick the value closest to -50mV. Sometimes tweaking VTT slightly up or down can help if none of the available values is close enough the desired offset. Of course, you will need to repeat the calculation using the new VTT.
Proper GTL reference level tuning can sometimes allow for a dramatic reduction in VTT and in some severe cases even permits the use of a lower core supply voltage (Vcore). The most recent x64 build of Prime95, version 25.6 build 6, provides an excellent means for testing the effectiveness of CPU-specific GTL tuning. Simply load the program, select the Blend type Torture Test, and watch for any instance to drop out. Note the instance number (which will correlate to the core in question), reset and enter the BIOS, make a small adjustment to the corresponding GTL reference value(s), and then start a new test run. If the test runs for a longer period of time then you can be confident that you are at least moving in the right direction. Continue this process until the system is sufficiently stable with the current settings.
Those that want to know more about GTL reference voltages and related tuning issues are encouraged to carefully examine more in-depth articles on the subject posted here and here.
NB GTL_REF Ratio - [Auto, Default, -126mV ~ +160mV] The NB (SPP) GTL reference voltage provides the same functionality as those for the CPU, the only difference being that the Northbridge uses only a single value. Tuning in the right GTL reference voltage (usually near the nominal 67% value) can sometimes lead to lower stable VDIMM requirements.
DDR3 CHA(1~2)/CHB(1~2) Ref Voltage - [Auto, Default, -126mV ~ +160mV] These voltages work like GTL references for memory, except that VTT for the memory is defined as one-half VDIMM. Small adjustments in either direction can sometimes bring additional stability or higher memory overclocks; however, testing the effectiveness of any change is exceedingly difficult and time consuming. Most of the time these are better off simply left on Auto.
CPU Configuration
CPU Internal Thermal Control - [Auto, Disabled] Always leave this on Auto as disabling internal thermal control can have unknown affects on system operation. According to sources at Intel, thermal control is required to be active if the CPU is expected to correctly function within specifications.
Limit CPUID MaxVal - [Enabled, Disabled] Some legacy operating systems (i.e. Windows NT SP2 and older) are unable to properly deal with the CPUID x86 opcode when called using operands greater than 3. The problem is that the boot code for these older system was written to query the CPU for the highest supported value and then to call a routine using this value. Unfortunately, the programmers did not have the foresight to account for future processors with higher values and the OS crashes with a BSOD due to the unhandled exception in a routine running with kernel mode privileges.
The result is a general incompatibility between these newer CPUs (with a maximum supported CPUID value of 4) and these older operating systems. Set this to Enabled if you experience just such a problem, otherwise leave this Disabled. Beware that improperly enabling this setting with Windows 2000, XP, or any flavor of Vista can cause serious performance problems.
Enhanced C1 (C1E) - [Enabled, Disabled] C1E functions to reduce the CPU multiplier to 6.0x when idling or running in load-load conditions. This can sometimes provide a small degree of power savings, especially if the system is highly overclocked to begin with. Most users find the constant switching between the idle and load frequencies annoying, besides which a small performance penalty is experienced during each transition. We usually disable this setting and recommend you do the same if you are building your system for gaming purposes.
Execute Disable Bit - [Enabled, Disabled] The Execute Disable (NX) Bit is typically used as a form of hardware protection against the execution of malicious code. This bit is part of the page table descriptor used to mark the memory page table as executable or not. This way programs that purposefully cause buffer overflows that end up spilling into the memory address space of other processes cannot execute injected data unless the page is specifically marked as containing executable code. Enabling this feature will force Physical Address Extension (PAE) Mode when running a 32-bit Windows OS regardless of the amount of system memory installed. This is because the NX bit resides at bit 63 of the page table entry and page table entries are only 32 bits in length with PAE disabled. 64-bit operating systems always run in PAE Mode. Enabling this feature has never negatively affected our ability to overclock.
Virtualization Technology - [Enabled, Disabled] This setting controls whether or not the BIOS masks requests sent to the CPU in determining whether or not Virtualization Technology (VT) is supported. Disabling this setting ensures the system cannot run any code pertaining to system virtualization. We usually leave this Disabled unless we have a good reason to enable it.
Enhanced Intel SpeedStep™ Tech. - [Enabled, Disabled] Although some BIOS releases may allows this features to be alternately Disabled or Enabled, it has no affect unless the installed CPU is capable of conducting power state transitions and no desktop chipset contains this feature set (yet). This option should be grayed out unless you have some special CPU have not encountered.
CPU Core 2/3/4 - [Enabled, Disabled] This setting merely controls a mask used by the BIOS in determining which cores are advertised as available for use by the host systems. Disabling cores can sometimes allow a quad-core CPU to function more like a dual-core CPU when it comes to FSB clocking. Numbering the cores from 1 is a mistake in our opinion; this option should really read "CPU Core 1/2/3".
Nvidia.
