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AMD 16 core chiplets fly under the radar

humbug

humbug

humbug

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Bergamo 128 core Zen 4 launched, 16 core Chiplets.

Genoa with 96 cores has 12 CPU chiplets (8 cores in each) Bergamo with 128 cores has 8 chiplets, 16 cores in each.

Apparently no one knew about this, the reason being AMD didn't have to do any engineering work with motherboard vendors, so no one out side of AMD saw one, AMD have come up with a way to drop a new CPU type in to an existing platform and package that has already had all the qualification engineering done.

I'll let the tech supports tech support Windell explain....

PS: GenoaX has 1.1GB of L3 cache :eek:

youtu.be

128 Cores & 3D V-Cache EPYC - Launching Today!

Wendell talks Genoa and Bergamo from the new 3d V-Cache CPUs from AMDAMD Tuning Guides: https://www.amd.com/en/processors/server-tech-docs/search?f%5B0%5D=do...
youtu.be youtu.be
 
humbug said:
Apparently no one knew about this, the reason being AMD didn't have to do any engineering work with motherboard vendors, so no one out side of AMD saw one, AMD have come up with a way to drop a new CPU type in to an existing platform and package that has already had all the qualification engineering done.
Click to expand...
I think a lot of that is helped by it retaining the standard IO die, and the fact that the actual cores are no different other than a Cache reduction.

Some more info here:
www.servethehome.com

AMD EPYC Bergamo is a Fantastically Fresh Take on Cloud Native Compute

The AMD EPYC 9754 128 core and 256 thread part is a fantastically fresh take on cloud-native computing that beat our high expectations
www.servethehome.com www.servethehome.com
 
Cyber-Mav said:
16 cores on a single chiplet would address the latency penalty of going from one 8 core chiplet to another.
Click to expand...
Not necessarily. Depends on how the 16 cores are connected.
Cores within chiplet talk to each other through L3 cache, and there is less of it per core and more cores sharing it.
Plus that latency only really matters on desktop and any improvement there will be wiped by reduced cache.
 
alec said:
Not necessarily. Depends on how the 16 cores are connected.
Cores within chiplet talk to each other through L3 cache, and there is less of it per core and more cores sharing it.
Plus that latency only really matters on desktop and any improvement there will be wiped by reduced cache.
Click to expand...

At 5-5.5ghz you would be firing the caches in pretty short order.
 
humbug said:
PS: GenoaX has 1.1GB of L3 cache :eek:
Click to expand...

Over 128+ cores that's not so hot - only the standard 8 MB per core. The thing is that the more cores you have the greater the chance of a cache miss - and the greater the chance of more than one - and then all the cores are slowed by accessing main memory over the same CPU-memory link. So the cache needs to be even larger.
 
Quartz said:
Over 128+ cores that's not so hot - only the standard 8 MB per core. The thing is that the more cores you have the greater the chance of a cache miss - and the greater the chance of more than one - and then all the cores are slowed by accessing main memory over the same CPU-memory link. So the cache needs to be even larger.
Click to expand...

That's Genoa, 96 cores, its 11.5MB per core.

There is no 3D cache Bergamo and never will be, they removed the through VIA's as part of compacting the architecture to make the 16 core CCD's only a little larger than the 8 core CCD's

PS: Standard in 4MB per core.
 
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Interesting video from Wendall, he points out how AMD have designed Zen 4 in such a way that the motherboard is only really communicating to the CPU via the I/O die which allows AMD to customise the chiplets to the requirements of it's clients without having to validate new motherboards as they will simply work on existing designs. That level of flexibility AMD can offer must be a huge competitive edge for AMD over Intel.
 
AMD should half the L3 and double the cores across the range: 6->12, 8->16, 12->24, 16->32.
AMD could then do 3D versions which would be more attractive as the extra L3 would be more beneficial. Not all software gets a big boost from big L3, extra cores would be nice for none gaming PC’s.
 
FredFlint said:
AMD should half the L3 and double the cores across the range: 6->12, 8->16, 12->24, 16->32.
AMD could then do 3D versions which would be more attractive as the extra L3 would be more beneficial. Not all software gets a big boost from big L3, extra cores would be nice for none gaming PC’s.
Click to expand...

Sounds expensive and 32 cores might be pushing it with dual channel memory. Not mention the power increase.
 
My 7950x does 5.7Ghz single core and 4Ghz all core using ECO 65W. A 32 core at 170W would probably do 4.5Ghz all core, so about 700Mhz drop when loaded 100%. DDR5 has around double the bandwidth of DDR4 and 5950X did fine with DDR4. Anyway, it would be interesting but it’s not going to happen anytime soon.
 
7950X scores about 38,000 MT R23. That's at 5.0 to 5.1Ghz.

The 16 core Zen 4C cores uses about 2 watts, 32 watts per 16 core CCD at 3.1Ghz, clocked up to 4.0Ghz they might use 3 watts per core, 50 watts for the 16 core CCD, per core they would be 78% the performance of the 5.1Ghz main cores.
38,000 / 2 = 19,000, 19,000 X 0.78 = 14,820 X 2 = 29,640 + 19,000 = 48,640 score in R23 and at a reduced power from 170 watts to 135 watts.

Remember unlike E-cores AMD C-Cores are the same cores as the P-Cores re-archtectured to be more compact and more power efficient, they have the same IPC. They are more power efficient than ARM cores.

AMD just keep doing it right.
 
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