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AMD patents Super-SIMD, first change to CU since GCN

ThestigGT999

ThestigGT999

ThestigGT999

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one nation under sony
So likely past Navi.

http://www.freepatentsonline.com/20180121386.pdf

A super single instruction, multiple data (SIMD) computing structure and a method of executing instructions in the super-SIMD is disclosed. The super-SIMD structure is capable of executing more than one instruction from a single or multiple thread and includes a plurality of vector general purpose registers (VGPRs), a first arithmetic logic unit (ALU), the first ALU coupled to the plurality of VGPRs, a second ALU, the second ALU coupled to the plurality of VGPRs, and a destination cache (Do$) that is coupled via bypass and forwarding logic to the first ALU, the second ALU and receiving an output of the first ALU and the second ALU. The Do$ holds multiple instructions results to extend an operand by-pass network to save read and write transactions power. A compute unit (CU) and a small CU including a plurality of super-SIMDs are also disclosed.
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interesting idea and it could lead to a good performance boost in situations where it is utilised.
 
HBM hasn't been a flop at all, it might have been eclipsed in the mainstream arena by GDDR5X, but it certainly hasn't been a flop.
 
I would say HBM has been a flop - it was designed to supersede GDDR in a big way and really hasn't. It is useful in some applications but generally is going to be eclipsed by GDDR(X)/6 in a lot of uses.
 
Rroff said:
I would say HBM has been a flop - it was designed to supersede GDDR in a big way and really hasn't. It is useful in some applications but generally is going to be eclipsed by GDDR(X)/6 in a lot of uses.
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It is because GDDR continues to develop. How much more would they develop it, though?
GDDR7, GDDR8?
 
Rroff said:
I would say HBM has been a flop - it was designed to supersede GDDR in a big way and really hasn't. It is useful in some applications but generally is going to be eclipsed by GDDR(X)/6 in a lot of uses.
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Yet the fastest gpu on the market uses it in the form of Titan V. Kaap says that gpu is sometimes 100% faster in certain situations. It's not been hbm and more that AMD's gpu's have not been fast enough to compete against Nvidia. In turn this makes hbm look bad.
 
Rroff said:
I would say HBM has been a flop - it was designed to supersede GDDR in a big way and really hasn't. It is useful in some applications but generally is going to be eclipsed by GDDR(X)/6 in a lot of uses.
Click to expand...

lol, which on package setup uses GDDR of any kind, none, which will use GDDR6, none, none ever, because it can't be used on package in any meaningful way, you'd fit one 1gb chip maybe?

HBM was never ever supposed to supersede GDDR, something else will supersede DDR, HBM is specifically for on package memory and it absolutely blows GDDR5x and GDDR6 out of the water when it comes to memory density and I/O power, the two areas HBM was designed to be superior to GDDR and allow it to be used on package. What is GDDR6 density going to start at, chips between 512 and 2GB, while HBM2 is already capable of doing 16GB per stack in less area than a single gddr5x die?

HBM won't be eclipsed by GDDR6 in any way shape or form. Not a single gpu, cpu, APU or FPGA that is planned to use HBM will ever use GDDR6, 7, 8 or 24 in place of it, because they are designed for completely different usage.

As HBM gets cheaper and produced in higher value it will move into midrange gpus and well, probably not the low end because the low end looks like it's simply going to disappear as HBM (and future chips that supersede HBM) allow APU performance that makes low end discrete gpus simply not worthwhile. Much of the volume of low end gpus currently goes into laptops and primarily because of a combination of Intel awful GPU performance/architecture/drivers and AMD being stuck on Bulldozer.

HBM is expensive because as with all new technologies there are industry teething issues and a limited amount of 3d packaging facilities. TSMC, Samsung, Glofo, Hynix and Intel are all moving towards and supporting microbump/tsvs/etc to enable 3d packaging methods to be utilised far more widely at 7nm. The entire industry is moving that way, as places that package cpus/gpus/memory all expand their stacked chip packaging the volume of production and packaging will increase and bring costs down drastically.

There will always be off package memory, but for the highest performance cpus and gpus, on package memory is very much the future and gddr (and whatever replaces it) has very little future anywhere density and performance are required. A couple of fast chips in a router and many other places that type of memory will be used for decades to come.
 
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drunkenmaster said:
lol, which on package setup uses GDDR of any kind, none, which will use GDDR6, none, none ever, because it can't be used on package in any meaningful way, you'd fit one 1gb chip maybe?

HBM was never ever supposed to supersede GDDR, something else will supersede DDR, HBM is specifically for on package memory and it absolutely blows GDDR5x and GDDR6 out of the water when it comes to memory density and I/O power, the two areas HBM was designed to be superior to GDDR and allow it to be used on package. What is GDDR6 density going to start at, chips between 512 and 2GB, while HBM2 is already capable of doing 16GB per stack in less area than a single gddr5x die?

HBM won't be eclipsed by GDDR6 in any way shape or form. Not a single gpu, cpu, APU or FPGA that is planned to use HBM will ever use GDDR6, 7, 8 or 24 in place of it, because they are designed for completely different usage.

As HBM gets cheaper and produced in higher value it will move into midrange gpus and well, probably not the low end because the low end looks like it's simply going to disappear as HBM (and future chips that supersede HBM) allow APU performance that makes low end discrete gpus simply not worthwhile. Much of the volume of low end gpus currently goes into laptops and primarily because of a combination of Intel awful GPU performance/architecture/drivers and AMD being stuck on Bulldozer.

HBM is expensive because as with all new technologies there are industry teething issues and a limited amount of 3d packaging facilities. TSMC, Samsung, Glofo, Hynix and Intel are all moving towards and supporting microbump/tsvs/etc to enable 3d packaging methods to be utilised far more widely at 7nm. The entire industry is moving that way, as places that package cpus/gpus/memory all expand their stacked chip packaging the volume of production and packaging will increase and bring costs down drastically.

There will always be off package memory, but for the highest performance cpus and gpus, on package memory is very much the future and gddr (and whatever replaces it) has very little future anywhere density and performance are required. A couple of fast chips in a router and many other places that type of memory will be used for decades to come.
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Very well summoned up as the advantages of HBM are not just about bandwidth and power there is so much more to it.
 
drunkenmaster said:
lol, which on package setup uses GDDR of any kind, none, which will use GDDR6, none, none ever, because it can't be used on package in any meaningful way, you'd fit one 1gb chip maybe?

HBM was never ever supposed to supersede GDDR, something else will supersede DDR, HBM is specifically for on package memory and it absolutely blows GDDR5x and GDDR6 out of the water when it comes to memory density and I/O power, the two areas HBM was designed to be superior to GDDR and allow it to be used on package. What is GDDR6 density going to start at, chips between 512 and 2GB, while HBM2 is already capable of doing 16GB per stack in less area than a single gddr5x die?

HBM won't be eclipsed by GDDR6 in any way shape or form. Not a single gpu, cpu, APU or FPGA that is planned to use HBM will ever use GDDR6, 7, 8 or 24 in place of it, because they are designed for completely different usage.

As HBM gets cheaper and produced in higher value it will move into midrange gpus and well, probably not the low end because the low end looks like it's simply going to disappear as HBM (and future chips that supersede HBM) allow APU performance that makes low end discrete gpus simply not worthwhile. Much of the volume of low end gpus currently goes into laptops and primarily because of a combination of Intel awful GPU performance/architecture/drivers and AMD being stuck on Bulldozer.

HBM is expensive because as with all new technologies there are industry teething issues and a limited amount of 3d packaging facilities. TSMC, Samsung, Glofo, Hynix and Intel are all moving towards and supporting microbump/tsvs/etc to enable 3d packaging methods to be utilised far more widely at 7nm. The entire industry is moving that way, as places that package cpus/gpus/memory all expand their stacked chip packaging the volume of production and packaging will increase and bring costs down drastically.

There will always be off package memory, but for the highest performance cpus and gpus, on package memory is very much the future and gddr (and whatever replaces it) has very little future anywhere density and performance are required. A couple of fast chips in a router and many other places that type of memory will be used for decades to come.
Click to expand...

Sure HBM will continue to be useful on-package but the pressure to use such a configuration for next generation designs has been reduced by advances in substrate technology and shrinks to GDDR.

Next gen 3D stacked DRAM was supposed to replace both DDR and GDDR - that includes the competing HMC as well as HBM and 1-2 other alternatives (pitched as a replacement for both here for instance https://doc.xdevs.com/doc/Memory/HB...Bandwidth-Kim-Hynix-Hot Chips HBM 2014 v7.pdf ).

As an aside the pace of technology at the moment will probably out pace demand for memory capacity meaning on smaller nodes you probably could produce GDDR suitable to use on-package.
 
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Rroff said:
Sure HBM will continue to be useful on-package but the pressure to use such a configuration for next generation designs has been reduced by advances in substrate technology and shrinks to GDDR.

Next gen 3D stacked DRAM was supposed to replace both DDR and GDDR - that includes the competing HMC as well as HBM and 1-2 other alternatives (pitched as a replacement for both here for instance https://doc.xdevs.com/doc/Memory/HBM/Hynix/HC26.11.310-HBM-Bandwidth-Kim-Hynix-Hot Chips HBM 2014 v7.pdf ).

As an aside the pace of technology at the moment will probably out pace demand for memory capacity meaning on smaller nodes you probably could produce GDDR suitable to use on-package.
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Shrinks or GDDR memory types come from new process nodes, which are reflected in the fact that everything else can be moved down a node also making all 'gains' equal and therefore no actual gains there at all.

As for technology outpacing capacity.... is that why the cards got smaller memory chips or less chips in the past 10 years or the past few nodes? No, because that hasn't happened at all and new nodes are getting much further apart than they used to be, the technology is slowing down. If we get 'stacked' gddr, it will no longer be GDDR. GDDR is relatively cheap because of it's simplicity, narrow bus, fairly simple logic. You stack them you need new logic to control it, if you vastly increase density on an off package memory then you either have wasted memory or you need higher bandwidth per chip. You seem to have forgotten how pin out for soldered connections usually limits chip size(as in, a chip can't be smaller than the number of I/O connections it needs) and one of the fundamental reasons chips can get stacked and end up with the number of connections required is moving to magnitude smaller bumps to be connected direct to a interposer rather than much larger bumps for connection to a PCB.

Capacity needs are not outpacing the technology to produce them, as is clearly evidenced by the fact that the biggest cards have used a similar number of similarly sized chips for years. Less chips = less bandwidth = less performance. Stacked memory off package doesn't work because of the I/O limitations, on package stacked memory would no longer be gddr. HBM is relatively speaking DDR with every change you'd need to make it work well as stacked memory.

GDDR won't ever end up on package because the fundamental use of it is off package memory, that brings limitations that prevent it becoming an on package memory and if you made a GDDR that worked on package, then that memory wouldn't work off package, so you'd take a product with a specific usage and make it rubbish for that usage.

As an aside, that PDF doesn't say replace, it just compares HBM to GDDR5 and says it offers lower power, far higher capacity, far higher bandwidth and far smaller floor space, all of which are true making it the superior choice, which is why AMD, Nvidia and Intel all used it for their most important highest end graphics projects so far.
 
drunkenmaster said:
As for technology outpacing capacity.... is that why the cards got smaller memory chips or less chips in the past 10 years or the past few nodes? No, because that hasn't happened at all and new nodes are getting much further apart than they used to be, the technology is slowing down.
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I'm talking about at the moment - sure there is no guarantee that will last indefinitely but we are getting to the point we can stick 64GB of VRAM (albeit not cheaply - but not stupidly expensive either) on a GPU at the moment and barely use any of it for gaming, etc.

You are also missing that I'm talking mostly in the focus of gaming GPUs - HBM simply isn't having its day in the main consumer GPU space and is still not looking like taking it over with the next generation either.

GDDR would always be at a disadvantage for on-package use in terms of capacity but that doesn't mean it necessarily won't have application.

drunkenmaster said:
GDDR won't ever end up on package because the fundamental use of it is off package memory, that brings limitations that prevent it becoming an on package memory and if you made a GDDR that worked on package, then that memory wouldn't work off package, so you'd take a product with a specific usage and make it rubbish for that usage.
Click to expand...

There is nothing that fundamentally stops GDDR being used on an interposer and while optimisation for that use could preclude being used off-package due to things like how is built around latency and tolerances for things like EMI that doesn't prevent you making versions for different operating environment - working it into the die itself a little different story though there are chips that use small amounts of embedded DRAM for caching.

EDIT: To be clear I don't actually think we will see GDDR used on package or only in very specific situations if it ever is - just that you constantly under-estimate its capabilities to stay relevant.
 
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