AMD Working With Hynix For Development of High-Bandwidth 3D Stacked Memory

[Gregster]

AMD has announced that it would be jointly working with memory manufacturer SK Hynix in the development of next generation High-bandwdith 3D Stacked memory products and solutions. Currently, there seems to be a huge need of bandwidth in processors (accelerated processing units) and graphic cards which require huge bandwidth output from the memory to sustain the graphical workload, this issues won’t be fixed until higher bandwidth and stacked memory kicks off to full commercialization.
AMD Hynix HBM Stacked memory

AMD And Hynix Developing High-Bandwidth Stacked Memory
AMD is the first to announce this joint development with Hynix since they noted that 2.5/3D stacked memory has already started shipping in FPGAs and Image sensor devices yet nothing is available on the mainstream and high-performance side which includes graphic processing units, accelerated processing units and several processors. Bryan Black, 3D program manager at AMD had the following to say:
“..there is nothing yet in mainstream computing CPUs, GPUs or APUs” but that “HBM (high bandwidth memory) will change this.”
“Getting 3D going will take a BOLD move and AMD is ready to make that move.” Black announced that AMD is co-developing HBM with SK Hynix which is currently sampling the HBM memory stacks and that AMD “…is ready to work with customers.” via Electroiq
So what is 3D Memory and how will it help solve the bandwidth crisis faced by APUs and GPUs? Die stacking mainly involves several memory chips stacked ontop of each other in a single die through 3D layering. This helps save both power consumption and space as you may have noted that current GPUs have memory arranged on the back when using excess of 4 GB VRAM such as the GeForce GTX Titan. This produces heat on both end so the less scattering of the chips on a board surface would result in lower temperatures for the PCB. The 3D Stacked memory would be used for both graphics, network memory as HBM and 3D Stacked design for Main memory.
Furthermore, these 3D Stacked memory designs would be HBM or High-Bandwidth Memory. So you’re getting a package that isn’t only power efficient and saves space but also runs faster than any defined GDDR5 chip currentl available on the market. The following quoted line from the article at Chipdesignmac helps illustrate the speed of HBM versus GDDR5 chips:
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HBM is another emerging memory standard defined by the JEDEC organization. HBM was developed as a revolutionary upgrade for graphics applications. GDDR5 was defined to support 28 GBps (7 Gbps x32). Expected to be available in mass production in 2015, the standard applies to stacked DRAM die, and is built on Wide I/O and TSV technologies to support bandwidth from 128GB/s to 256GB/s. JEDEC’s HBM task force is now part of the JC-42.3 Subcommittee, which continues to work to define support for up to 8-high TSV stacks of memory on a 1,024-bits wide data interface. The subcommittee expects to publish the standard late 2013. via Chipdesignmag
NVIDIA Volta GPU

It is indicated that the first consumer application to use 3D Stacked memory technology would probably be the GPU. Yes, we have heard that before, remember NVIDIA’s last GTC 2013 press conference where the revealed their latest GPU roadmap? That roadmap clearly showed their 2016 GPU codenamed ‘Volta’ which would be NVIDIA’s first consumer product to feature Stacked Memory with bandwidth of 1 TB/s. Now compare 1 TB/s of Volta to 336 GB/s of NVIDIA’s current flagship GeForce GTX 780 TI and you can see the difference.
AMD can possibly feature the 3D Stacked memory in their next generation 20nm graphics cards which are possibly codenamed ‘Pirate Islands’. This is not confirmed but if any product with stacked memory makes sense, then those have to be the GPUs. Apart from GPUs, AMD can also feature on-die stacked memory with their new APUs. Carrizo, their APU for 2015 with Excavator core is most likely going to extend DDR3 memory support so its successor which is rumored to be codenamed Basilisk will either feature Stacked memory or go with DDR4. HBM seems like a better choice due to the higher bandwidth output which is required by the Radeon R series IGP inside the chip.
One thing is for sure that Stacked memory seems to be the future trend for both graphic giants and we cannot wait to see how it gets integrated inside their next generation products.


Read more: http://wccftech.com/amd-working-hynix-development-highbandwidth-3d-stacked-memory/#ixzz2nrFhnzpg

AMD working on stacked memory...Where have I read this before?

 

[andybird123]

on DM's website

 

[humbug]

AMD together with Amkor developed Memory Stacking, I do believe the PS4 has stacked memory.

Here's a PDF, and another AMD and Hynix are the right people to do this for GPU's.

 

[Silent_Scone]

It does Humbug. This is good news. Finally get some use out of that 512bit bus they like to tell you about

(FYI I'm aware the bus will be substantially larger)

 

[ubersonic]

AMD together with Amkor

I read that as Arknor the first time XD

 

[humbug]

I read that as Arknor the first time XD

Probably not the best links to illustrate this, other than pulling them from the AMD website i didn't actually read it, yes Amkor's logo are all over it, it is Amkor licanced with AMD rarely mentioned.

AMD and Amkor are development partners, since 2009, the only way you would know they have anything to do with eachother is a joint Facebook page that they don't even use.

There was some limited journalistic reporting on the joint stacking venture in 2011 that i can't find now, for sure its a join talent pooling venture, or was, not just AMD. But SK-Hynix obviously feel they need AMD's expertise.

AMD have no marketing nouce, they have never, or up-until very recently never told anyone about anything they do and don't say what they have done, for example no one, even in the enthusiast world even know that AMD developed x86_64, Integrated Memory controllers... the list goes on quiet extensively. yet everyone is using this stuff.
Its only now that they are starting to say "look at what we are doing in 'Heterogeneous Uniform Memory Access' and 'Heterogeneous system architecture'" only they are doing it badly, they really do need to learn from Nvidia who know how to market themselves.