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Can someone explain clock cycles in simple terms?

Lysander

Lysander

Lysander

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OK, I don't know that much about the workings of CPUs, but I know that the rule used to be, the more Ghz, the faster the processor.

However, now I'm told that it's not just about clock cycles per se but the quality of the cycles. What does this all mean?

Does this mean that a P4 2.8Ghz is less fast and effective than a e6600 at stock?
 
In simple terms, core 2 cpus do a lot more work for every clock cycle than a PIV cpu, so yes a 2.4 E6600 would trounce a PIV 2.8. Simply put, the core 2 engine is more efficient that netburst engines thus does not need as much raw cpu clock to equal performance. Sort of like an engine needing to displace 2 litres for 160hp but another more efficient engine can displace 1litre for 100hp thus 200hp etc..
 
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You know the Pentium Ds are they just like 2 Netburst processors stuck together, just like the Intel quads out now, which are 2 C2D pretty much stuck together?

Would a E6300 at stock trounce a Pentium d 3.4?
 
An E6600 is probably closer to twice or maybe even three times faster than a P4 @ 2.8GHz.

Do you know much about car engines? Think of clock cycles as the revs. Think of the "quality" of each cycle as torque.

Or another analogy... big shovel means you can shovel more coal but at a slower rate. A smaller shovel means you can shovel smaller amounts of coal but at a faster rate. A Core 2 Duo would be the former and a P4 would be the latter.

Technically it's all down the length of the CPU's pipeline and it's "branch" prediction. Any time a piece of software comes to a line of code that asks a question (e.g. "Is 5 more than 100?") can cause a pipeline flush if the CPU predicted it incorrectly. A pipeline is basically the way a chunk of work is broken up into smaller pieces. For instance the previous example might get broken up into maybe 4 chunks on a P4 chip but on a C2D it is almost certainly just one chunk in the pipeline. This means the C2D can push other instructions into the pipeline from the saved space.
 
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stickroad said:
You know the Pentium Ds are they just like 2 Netburst processors stuck together, just like the Intel quads out now, which are 2 C2D pretty much stuck together?

Would a E6300 at stock trounce a Pentium d 3.4?
Click to expand...
The Smithfield's were stuck together, the Presler's (later variant of the P4D) were dual core on a single die (or as some people like to call it "native dual core").

For what it's worth I did a simple benchmark with my mate the other day when extracting a 4GB RAR archive. On my E6300 at stock it took just under 3 minutes. On my mate's P4 at 3.2GHz it took almost 6 minutes.
 
Emlyn_Dewar said:
Surely time to search for the classic shovel description? *goes off looking* :D
Click to expand...
Already done it :D

NathanE said:
Or another analogy... big shovel means you can shovel more coal but at a slower rate. A smaller shovel means you can shovel smaller amounts of coal but at a faster rate. A Core 2 Duo would be the former and a P4 would be the latter.
Click to expand...
 
NathanE said:
An E6600 is probably closer to twice or maybe even three times faster than a P4 @ 2.8GHz.

Do you know much about car engines? Think of clock cycles as the revs. Think of the "quality" of each cycle as torque.

Or another analogy... big shovel means you can shovel more coal but at a slower rate. A smaller shovel means you can shovel smaller amounts of coal but at a faster rate. A Core 2 Duo would be the former and a P4 would be the latter.

Technically it's all down the length of the CPU's pipeline and it's "branch" prediction. Any time a piece of software comes to a line of code that asks a question (e.g. "Is 5 more than 100?") can cause a pipeline flush if the CPU predicted it incorrectly. A pipeline is basically the way a chunk of work is broken up into smaller pieces. For instance the previous example might get broken up into maybe 4 chunks on a P4 chip but on a C2D it is almost certainly just one chunk in the pipeline. This means the C2D can push other instructions into the pipeline from the saved space.
Click to expand...

Right, this is very helpful. An anology that helps me is:

Let's say you have a road, and the width of that road lets 1000 cards go down it per hour. Now, if you treble the width of the road, but slightly degrade the surface, it means that more cars can go down it, but slightly slower. This would mean that in spite of the fact that the cars are going slower, more of them can get through i.e. more information is processed.

I've been looking at Wikipedia and trying to understand the concept of clock cycles. Can anyone briefly explain them?
 
The "clock" speed is how fast the CPU can "tick" in one second (Like a clock or metronome).

Eg in the old days faster Mhz = Better.

Over the last few years this has changed and now it is more important to know how much can be done in each tick.

Eg

You have 2 cars side by side. They are both identical except for the quality of the tires.

Both cars take off down the road at full speed.

One car has bald tires and we dub him the P4 prescot.

The other car has High quality racing tires. Lets call this the Core 2 Duo.

Although both cars have identical engines, transmissions, the car with the better tires can grip road better and will accelerate faster.
The car with the bald tires has poor grip and will accelerate slower.

Basically the Core 2 Duo can do more per revolution of the tire (Clock speed) than the P4 because it is better engineered (better grip).
 
http://en.wikipedia.org/wiki/Intel_Core_2

Unlike NetBurst-based processors, such as the Pentium 4 and Pentium D, Core 2 does not stress designs based on extremely high clock speeds but rather improvements in the processor's usage of both available clock cycles and power. This translates into more efficient decoding stages, execution units, caches, and buses, as well as many other factors.
Click to expand...

Efficiency is the key.
 
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Justintime said:
Still is, its all within the generation though. A 700Mhz PIII would be faster than a 600Mhz PIII but not faster than an 600MHz Core 2 Duo.
Click to expand...

Yes I totally agree. Within a given Architecture the clockspeed is the main difference. In addition faster faster chips may have more cache, smaller process , more CPU cores, a faster Ram controller or other improvements.

Within a given series the model numbers are your best guide.
 
It's worth noting though that the P4 Northwood had a 20 stage pipeline whereas P4 Prescott had a 31 stage pipeline, so the later Prescott's were not as fast clock for clock as the earlier Northwood's.
 
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