started looking into codenames for CPU because i was getting confused and there's tons 
Appaloosa: This was to be the 0.13-micron-process version of AMD's Duron (i.e. a Duron version of the current Athlon XP Thoroughbred, akin to the Duron/Morgan version of the old Athlon XP Palomino).
Banias: Intel's next notebook/laptop CPU, a battery-thrifty design which it hopes will elbow aside the mobile Pentium 4 (actually, the Banias core reportedly resembles the older, still marvelously efficient Pentium III) started in the first quarter of 2003.
Barton: The next version of AMD's Athlon XP; successor to the "Thoroughbred" Athlon XP 2700+ and 2800+. Barton is built on the same 0.13-micron process, but doubles the on-chip Level 2 cache from 256K to 512K, so pundits predict a roughly 10-percent performance boost.
ClawHammer: Cool jargon for the desktop and mobile versions of AMD's forthcoming Hammer processor, scheduled to ship under some new variant of the Athlon brand in the first half of 2003 and moved from an 0.13- to 0.09-micron process in the second half of the year. For servers and workstations, there's two-way ClawHammer DP version marketed under the Opteron label.
Deerfield: Sort of a 64-bit Celeron -- a forthcoming economy version of Intel's Itanium (actually Madison), with 1MB of Level 3 cache.
Dothan: What'll be inside "Intel inside" notebooks in the fourth quarter of 2003 -- the 90-nanometer-process successor to the forthcoming 0.13-micron Banias mobile CPU, reportedly to use the same 400MHz system bus but hike the Level 2 cache from 1MB to 2MB.
Foster: The Xeon (server and multiprocessing) variant of Intel's 0.18-micron-process Pentium 4 Willamette.
Gallatin: A jumbo-cache (1MB or 2MB Level 2) upgrade of Intel's P4-sibling Xeon for multiprocessor servers.
Hammer: The generic name for AMD's long-awaited, eighth-generation, 64-bit processor, arrived in the first half of 2003. Unlike Intel's start-from-scratch 64-bit Itanium series, Hammer (a.k.a. K8) also runs existing 32-bit programs at top speed, without having to switch into an emulation mode. See ClawHammer, SledgeHammer, and Opteron.
Madison: The 0.13-micron-process successor to Intel's 0.18-micron process Itanium 2 (McKinley), with 6MB of Level 3 cache (Intel says a staggering 288 million of Madison's even more staggering 500 million transistors will be cache SRAM).
McKinley: Intel's Itanium 2 server CPU, an 0.18-micron-process whopper with 32K of Level 1, 256K of Level 2, and either 1.5MB or 3MB of Level 3 cache.
Merced: The first of Intel's Itanium 64-bit processor family.
Morgan: The current (1.0GHz through 1.3GHz) AMD Duron economy processors, basically 0.18-micron Palominos with one-quarter as much L2 cache (64K).
Nehalem: successor to Intel's Prescott and Tejas; unlike them, it'll represent a clean break from the Pentium 4 line -- the next blank slate, so to speak, in Intel's 32-bit processor progression. Gossip says it'll debut on a 90-nanometer and then switch to a 65-nanometer process, with a clock speed of 1.8 googolhertz.
Nocona: The server flavor of Intel's Prescott; it'll succeed the current Xeon version of the Pentium 4.
Northwood: Intel Pentium 4 desktop processor, built on an 0.13-micron process with 512K of Level 2 cache. Runs at 2.8GHz with a 533MHz front-side bus; a 3.06GHz chip with Intel's Hyper-Threading technology -- which fools software into thinking that a single-CPU system is a two-chip multiprocessor platform, yielding (Intel says) a performance gain of up to 25 percent.
Opteron: The trademark AMD will use for multiprocessor server and workstation versions of 2003's Hammer CPU.
Palomino: AMD's first Athlon XP (the XP 1500+ through 2100+), which succeeded the Athlon "Thunderbird" in October 2001. Equipped with 128K of Level 1 and 256K of Level 2 cache, it's built on an 0.18-micron process.
Prescott: Intel's desktop Pentium 4 from Northwood's 0.13-micron to an 0.09-micron (90-nanometer) manufacturing process, just as Northwood succeeded the 0.18-micron Willamette. Best guess for its debut clock speed is 3.2GHz, with fanboys already hoping for 4.0GHz and 1MB of on-chip Level 2 cache. The Pentium 4's front-side bus, which has evolved from 400MHz to 533MHz, should step up to 667MHz with Prescott.
Prestonia: Intel's current Xeon, the server-duty sibling of the 0.13-micron Pentium 4 Northwood, with the same 400MHz and 533MHz system buses and 512K of Level 2 cache. When it appeared last February, it was the first CPU to implement Intel's Hyper-Threading scheme.
SledgeHammer: The industrial-strength multiprocessing (up to eight-way) or enterprise server version of AMD's Hammer 64-bit processor.
Tejas:leaked codename for the enhanced successor to today's Pentium 4 successor Prescott.
Thoroughbred: Affectionately abbreviated as Tbred, this is AMD's current Athlon XP desktop processor, built on an 0.13-micron process (versus the 0.18-micron process of Palomino) with 128K of Level 1 and 256K of Level 2 cache. Debuted with the Athlon XP 2200+ (June 2002); swiftly revised and enhanced with the "Thoroughbred B" core of the Athlon XP 2400+ and 2600+ (August/September 2002); boosted further by stepping from a 266MHz to 333MHz front-side bus with the Athlon XP 2700+ and 2800+ (November 2002).
Tualatin: The last, best revision of Intel's Pentium III desktop processor, with 0.13-micron process architecture and a hefty 512K Level 2 cache. The Celeron/1.1A, /1.2, /1.3, and /1.4 value CPUs are Tualatins with 256K of L2 cache and a 100MHz front-side bus.
Willamette: The original, 0.18-micron-process version of Intel's desktop Pentium 4 processor, available initially for 423-pin and later for 478-pin (same as the current 0.13-micron Northwood) sockets and equipped with a 400MHz front-side bus and 256K of Level 2 cache. The current 1.7GHz and 1.8GHz desktop Celerons are actually Pentium 4 siblings, Willamette chips with only 128K of L2 cache; the 2.0GHz Celeron is ditto with 0.13-micron manufacturing, making it a CeleNorthWillaron.
Conroe
Kentsfield
Windsor
Brisbane
Barcelona
Woodcrest
Cloverton
Clovertown
have to excuse half the descriptions are out of date, how many more are there ?
MW
Appaloosa: This was to be the 0.13-micron-process version of AMD's Duron (i.e. a Duron version of the current Athlon XP Thoroughbred, akin to the Duron/Morgan version of the old Athlon XP Palomino).
Banias: Intel's next notebook/laptop CPU, a battery-thrifty design which it hopes will elbow aside the mobile Pentium 4 (actually, the Banias core reportedly resembles the older, still marvelously efficient Pentium III) started in the first quarter of 2003.
Barton: The next version of AMD's Athlon XP; successor to the "Thoroughbred" Athlon XP 2700+ and 2800+. Barton is built on the same 0.13-micron process, but doubles the on-chip Level 2 cache from 256K to 512K, so pundits predict a roughly 10-percent performance boost.
ClawHammer: Cool jargon for the desktop and mobile versions of AMD's forthcoming Hammer processor, scheduled to ship under some new variant of the Athlon brand in the first half of 2003 and moved from an 0.13- to 0.09-micron process in the second half of the year. For servers and workstations, there's two-way ClawHammer DP version marketed under the Opteron label.
Deerfield: Sort of a 64-bit Celeron -- a forthcoming economy version of Intel's Itanium (actually Madison), with 1MB of Level 3 cache.
Dothan: What'll be inside "Intel inside" notebooks in the fourth quarter of 2003 -- the 90-nanometer-process successor to the forthcoming 0.13-micron Banias mobile CPU, reportedly to use the same 400MHz system bus but hike the Level 2 cache from 1MB to 2MB.
Foster: The Xeon (server and multiprocessing) variant of Intel's 0.18-micron-process Pentium 4 Willamette.
Gallatin: A jumbo-cache (1MB or 2MB Level 2) upgrade of Intel's P4-sibling Xeon for multiprocessor servers.
Hammer: The generic name for AMD's long-awaited, eighth-generation, 64-bit processor, arrived in the first half of 2003. Unlike Intel's start-from-scratch 64-bit Itanium series, Hammer (a.k.a. K8) also runs existing 32-bit programs at top speed, without having to switch into an emulation mode. See ClawHammer, SledgeHammer, and Opteron.
Madison: The 0.13-micron-process successor to Intel's 0.18-micron process Itanium 2 (McKinley), with 6MB of Level 3 cache (Intel says a staggering 288 million of Madison's even more staggering 500 million transistors will be cache SRAM).
McKinley: Intel's Itanium 2 server CPU, an 0.18-micron-process whopper with 32K of Level 1, 256K of Level 2, and either 1.5MB or 3MB of Level 3 cache.
Merced: The first of Intel's Itanium 64-bit processor family.
Morgan: The current (1.0GHz through 1.3GHz) AMD Duron economy processors, basically 0.18-micron Palominos with one-quarter as much L2 cache (64K).
Nehalem: successor to Intel's Prescott and Tejas; unlike them, it'll represent a clean break from the Pentium 4 line -- the next blank slate, so to speak, in Intel's 32-bit processor progression. Gossip says it'll debut on a 90-nanometer and then switch to a 65-nanometer process, with a clock speed of 1.8 googolhertz.
Nocona: The server flavor of Intel's Prescott; it'll succeed the current Xeon version of the Pentium 4.
Northwood: Intel Pentium 4 desktop processor, built on an 0.13-micron process with 512K of Level 2 cache. Runs at 2.8GHz with a 533MHz front-side bus; a 3.06GHz chip with Intel's Hyper-Threading technology -- which fools software into thinking that a single-CPU system is a two-chip multiprocessor platform, yielding (Intel says) a performance gain of up to 25 percent.
Opteron: The trademark AMD will use for multiprocessor server and workstation versions of 2003's Hammer CPU.
Palomino: AMD's first Athlon XP (the XP 1500+ through 2100+), which succeeded the Athlon "Thunderbird" in October 2001. Equipped with 128K of Level 1 and 256K of Level 2 cache, it's built on an 0.18-micron process.
Prescott: Intel's desktop Pentium 4 from Northwood's 0.13-micron to an 0.09-micron (90-nanometer) manufacturing process, just as Northwood succeeded the 0.18-micron Willamette. Best guess for its debut clock speed is 3.2GHz, with fanboys already hoping for 4.0GHz and 1MB of on-chip Level 2 cache. The Pentium 4's front-side bus, which has evolved from 400MHz to 533MHz, should step up to 667MHz with Prescott.
Prestonia: Intel's current Xeon, the server-duty sibling of the 0.13-micron Pentium 4 Northwood, with the same 400MHz and 533MHz system buses and 512K of Level 2 cache. When it appeared last February, it was the first CPU to implement Intel's Hyper-Threading scheme.
SledgeHammer: The industrial-strength multiprocessing (up to eight-way) or enterprise server version of AMD's Hammer 64-bit processor.
Tejas:leaked codename for the enhanced successor to today's Pentium 4 successor Prescott.
Thoroughbred: Affectionately abbreviated as Tbred, this is AMD's current Athlon XP desktop processor, built on an 0.13-micron process (versus the 0.18-micron process of Palomino) with 128K of Level 1 and 256K of Level 2 cache. Debuted with the Athlon XP 2200+ (June 2002); swiftly revised and enhanced with the "Thoroughbred B" core of the Athlon XP 2400+ and 2600+ (August/September 2002); boosted further by stepping from a 266MHz to 333MHz front-side bus with the Athlon XP 2700+ and 2800+ (November 2002).
Tualatin: The last, best revision of Intel's Pentium III desktop processor, with 0.13-micron process architecture and a hefty 512K Level 2 cache. The Celeron/1.1A, /1.2, /1.3, and /1.4 value CPUs are Tualatins with 256K of L2 cache and a 100MHz front-side bus.
Willamette: The original, 0.18-micron-process version of Intel's desktop Pentium 4 processor, available initially for 423-pin and later for 478-pin (same as the current 0.13-micron Northwood) sockets and equipped with a 400MHz front-side bus and 256K of Level 2 cache. The current 1.7GHz and 1.8GHz desktop Celerons are actually Pentium 4 siblings, Willamette chips with only 128K of L2 cache; the 2.0GHz Celeron is ditto with 0.13-micron manufacturing, making it a CeleNorthWillaron.
Conroe
Kentsfield
Windsor
Brisbane
Barcelona
Woodcrest
Cloverton
Clovertown
have to excuse half the descriptions are out of date, how many more are there ?
MW