Intel announce APX and AVX10

[Nutty667]

Intel has finally pulled their finger out and announced some new performance extensions for programmers.

Intel Details APX - Advanced Performance Extensions - Phoronix

www.phoronix.com

APX doubles the number of general purpose registers from 16 to 32, alleviate register pressure.
"Intel APX doubles the number of general-purpose registers (GPRs) from 16 to 32. This allows the compiler to keep more values in registers; as a result, APX-compiled code contains 10% fewer loads and more than 20% fewer stores than the same code compiled for an Intel 64 baseline. Register accesses are not only faster, but they also consume significantly less dynamic power than complex load and store operations."

Also a new AVX instruction set AVX10 that works across P and E cores. 256bits wide on E cores and optionally 512bits wide on P cores.
Due to the ability to have variable length vectors, we may see 1024 bits in the future.

Intel AVX10: Taking AVX-512 With More Features & Supporting It Across P/E Cores - Phoronix

www.phoronix.com

 

[Cyber-Mav]

They should get avx512 before jumping to anything else

 

[Nutty667]

The problem is the E cores can't handle the power requirements of AVX512.
This new version encompasses AVX512, but has the ability to run at variable vector lengths. So you don't have to code twice for P cores and E cores.

I'm more interested in the register extensions. Eliminating 10% of reads and 20% of writes will give a pretty decent boost to code performance.

 

[Wing-Man]

The problem is the E cores can't handle the power requirements of AVX512.
This new version encompasses AVX512, but has the ability to run at variable vector lengths. So you don't have to code twice for P cores and E cores.

I'm more interested in the register extensions. Eliminating 10% of reads and 20% of writes will give a pretty decent boost to code performance.

So your more interested in what it can do, but what the atom cores can’t handle… it’s all good