Intel put a dampener on prospective Spring IDF 2008 revelations by first announcing scant details of its upcoming Nehalem CPU architecture over a year ago, adding liberally at Fall IDF 2008, and then providing some real meat on the specifications' bones two weeks ago.
Combining what we know already, Nehalem will be core-scalable from two to eight execution cores on a single socket that, along with the architecture's simultaneous multi-threading, lead to concurrent four-to-16-thread computing. Initial desktop-oriented models, dubbed Bloomfield, will feature four execution cores with, obviously, eight-thread capability.
Nehalem, like the Core architecture, will provide platform-wide support, from notebooks to servers. Unlike Core (2), however, Nehalem will utilise a building-block approach that can potentially add-in non-CPU cores on to the die - integrated graphics being a prime example.
Thinking of the 1,366-pin, 731M-transistor quad-core model, each core will have access to its own 256KiB of L2 cache, and share a pool of 8MiB L3 cache The CPU's memory controller is integrated, supporting tri-channel DDR3-1333, and the processor will interface with an all-new I/O hub, Tylersburg - and each other in a two-socket environment - via the QuickPath point-to-point Interconnect that replaces the ageing, incumbent Front-Side Bus (FSB).
Tylersburg will support a single processor, via QuickPath, obviously, that'll be aimed at high-end desktop PCs, and a two-socket arrangement primarily aimed at the high-performance computing crowd. Hooking up to the southbridge - ICH10, most likely - via the present DMI bus. Expect to see the first iterations of Nehalem hit the shelves in Q1 2009
The long and short of it is that Nehalem, we reckon, will offer around 30 per cent better performance, on a clock-for-clock basis, when compared to Core 2, in a heavily-multithreaded environment - HPC and low-end servers, mainly. These gains diminish with lighter workloads that are the mainstay of the desktop environment, so don't be surprised to see some not-quite-as-impressive-as-expected numbers coming your way soon.
Naturally, Intel was keen to point out that early silicon, A1, was in good working order. That's why a number of Nehalem-based systems were on show at IDF 2008.
Here's a Bloomfield-based (quad-core) Nehalem system that was up and running a dynamic-airflow simulation.
Now, with the SMT present on the cores, the operating system sees eight processors in device manager. Remember, however, that it's a single-socket system.
Intel isn't talking about launch frequencies at the moment, but we expect to see Bloomfield ship at up-to 3.6GHz in Q4 2008.
The sample was running at 3.20GHz and, as you would expect, interfacing is tri-channel DDR3-1333 memory.
We weren't able to gain any performance numbers, no matter how much misdirection was aimed at the Intel representative.
Can we expect 6 DIMM sockets on future mobos then?
