Intel Says AMD EPYC Processors "Glued-together" in Official Slide Deck

laddy · 13 Jul 2017 at 07:12

http://www.overclock.net/t/1634249/...cessors-glued-together-in-official-slide-deck

What is happening over at Intel's marketing team? This is just turning into a mud slinging competition....

This article from techpowerup really sums up my thoughts on it. I just wish Intel would take the competition and push back with something better.
................

This will have you grinning - Amd are really upsetting intel

d_brennen · 13 Jul 2017 at 07:15

High end datacenter is a massive cash cow for Intel. I imagine they are a little concerned as Epyc represents a real threat. The response? Pricing up, FUD mode engaged

james.miller · 13 Jul 2017 at 07:46

Didnt AMD do the same thing when they released a native quad core before intel?

EsaT · 13 Jul 2017 at 08:41

It confirms officially that Intel got caught sitting pants down fingers up their butt.
(and other hand in cookie jar, pumping up prices)

They don't have anything to answer AMD's modular design allowing huge amount more economical making of high core count processors in comparison to Intel's huge "monolithic" chips.
Also AMD caught Intel in energy efficiency, which matters lot on servers etc.

If AMD had equally good manufacturing process Intel would be in in troubles to maintain performance advantages even in desktop.

laddy said:
What is happening over at Intel's marketing team?

Actually Intel doesn't even anymore have any European marketing.
That's why European reviewers had such problems in getting 7900Ks.

DrBombcrater · 13 Jul 2017 at 12:49

james.miller said:
Didnt AMD do the same thing when they released a native quad core before intel?

Mostly, yes. But that criticism was fully justified. The Core 2 Quad was literally just a pair of Core 2 Duo chips stuck on the same package. The C2D wasn't designed to work like that and there was no way for the two chips to directly communicate with each other, they had to send everything over the bus to the North Bridge chip on the motherboard and back again. Essentially AMD smacked down Intel for bodging together the crudest thing they could actually legally sell as a quad core.

Epyc (and Threadripper) are not a bodge by any measure. AMD has deliberately designed the Zeppelin die to work very effectively in a multi-chip package, because they believe the benefits make it a better course of action than designing a monolithic chip. Calling Epyc 'glued together' is just a cheap shot from a panicked marketing department, I've very sure none of Intel's engineers who've actually studied Epyc would go on record with a statement like that.

james.miller · 13 Jul 2017 at 15:26

DrBombcrater said:
Mostly, yes. But that criticism was fully justified. The Core 2 Quad was literally just a pair of Core 2 Duo chips stuck on the same package. The C2D wasn't designed to work like that and there was no way for the two chips to directly communicate with each other, they had to send everything over the bus to the North Bridge chip on the motherboard and back again.

Well it didnt amount to much, did it? The q6600 was still faster than the phenom 9500 quad core almost across the board and it used less power even though it had two separate dies. And it didnt have the TLB bug either, which hurt the phenom even further.

Essentially AMD smacked down Intel for bodging together the crudest thing they could actually legally sell as a quad core.

Legally? That's a strange thing to say. There's no legal definition when it comes to the arrangement of cores in a cpu package. Which is lucky, i guess, as that's what AMD are doing now.

kitfit1 · 14 Jul 2017 at 06:44

james.miller said:
Legally? That's a strange thing to say. There's no legal definition when it comes to the arrangement of cores in a cpu package. Which is lucky, i guess, as that's what AMD are doing now.

Although nothing to do with what you have posted James.miller, when i read "legal" i thought i'd just check if AMD had patented Infinity Fabric and they have.
That could be very interesting going forward, because of course it means that Intel can't copy it. That really does make it even harder for them because they will have to come up with something very innovative, as they haven't done that in years there will be a lot of head scratching at Intel Towers

james.miller · 14 Jul 2017 at 07:54

They already did, with Skylake-x (i believe, somebody will correct me if im wrong) Intel moved to a mesh topology where each core is connected to the cores directly above and to the side of it. Previously they used a ringbus design. I'm guessing the mesh design is comparable to Infinity Fabric but I've not looked in to it in all honesty!

edit: http://www.tomshardware.com/reviews/intel-core-i9-7900x-skylake-x,5092-2.html

On paper at least mesh seems to outperform Infinity fabric.

kitfit1 · 14 Jul 2017 at 09:09

james.miller said:
They already did, with Skylake-x (i believe, somebody will correct me if im wrong) Intel moved to a mesh topology where each core is connected to the cores directly above and to the side of it. Previously they used a ringbus design. I'm guessing the mesh design is comparable to Infinity Fabric but I've not looked in to it in all honesty!

edit: http://www.tomshardware.com/reviews/intel-core-i9-7900x-skylake-x,5092-2.html

On paper at least mesh seems to outperform Infinity fabric.

Mesh is similar, but not the same as IF. IF only ever has a maximum of 2 hops between any of the cores so latency is very low. Mesh can only "talk" to the cores around it with low latency. If it needs to talk to a core 2 hops or 4 hops away latency rises a lot.

ubersonic · 14 Jul 2017 at 09:22

Haha, that's rich coming from the company that quite literally soldered two of it's Pentium 4 cores onto the same chip to make it's first dual core because they had no idea how to make a native one and were desperate to compete XD

mmj_uk · 14 Jul 2017 at 18:29

If you don't take the "glued together" part literally they are probably right, even the current 8-core Ryzen's use a modular design (quad core modules) like most recent AMD architectures.

RSR · 14 Jul 2017 at 18:32

I do like the use of WCCF quotes in the official side deck though. :eek:

Rroff · 14 Jul 2017 at 18:37

DrBombcrater said:
Mostly, yes. But that criticism was fully justified. The Core 2 Quad was literally just a pair of Core 2 Duo chips stuck on the same package. The C2D wasn't designed to work like that and there was no way for the two chips to directly communicate with each other, they had to send everything over the bus to the North Bridge chip on the motherboard and back again. Essentially AMD smacked down Intel for bodging together the crudest thing they could actually legally sell as a quad core.

Epyc (and Threadripper) are not a bodge by any measure. AMD has deliberately designed the Zeppelin die to work very effectively in a multi-chip package, because they believe the benefits make it a better course of action than designing a monolithic chip. Calling Epyc 'glued together' is just a cheap shot from a panicked marketing department, I've very sure none of Intel's engineers who've actually studied Epyc would go on record with a statement like that.

You are talking more about the Pentium Ds (in terms of the criticism) and hence why Intel moved away from the NetBurst architecture - the Core 2 Quads could communicate over the FSB with reasonably low latency - inter-core latency was around 60-70ns despite being over the FSB and the bandwidth was reasonably decent for the time - nothing like how shackled they were with the Pentium Ds - despite a relatively crude implementation it works about as well as you'd have got from a "native" quad core at that time. AMD did take pokes at Intel then for basically gluing 2 dies together so I guess Intel is now having a poke back :s The Core 2 Quads weren't really a bodge job like the Pentium D multicores were.

kitfit1 said:
Mesh is similar, but not the same as IF. IF only ever has a maximum of 2 hops between any of the cores so latency is very low. Mesh can only "talk" to the cores around it with low latency. If it needs to talk to a core 2 hops or 4 hops away latency rises a lot.

Intel has been working on the crossbar implementation, etc. to reduce that - its also a bit more complex a story though as in some tasks that latency can be offset by better efficiency in other relevant areas depending on task and high inter-core latency is less of a penalty usually for "big data" type uses over something like gaming where it can have a much bigger penalty - something people getting these kind of CPUs for gaming purposes even if its a secondary purpose probably want to keep a close eye to the benchmarks for. IF's main strength over Intel's mesh, etc. systems are that they are designed for much wider and more expandable application.

kitfit1 · 14 Jul 2017 at 19:00

Rroff said:
Intel has been working on the crossbar implementation, etc. to reduce that - its also a bit more complex a story though as in some tasks that latency can be offset by better efficiency in other relevant areas depending on task and high inter-core latency is less of a penalty usually for "big data" type uses over something like gaming where it can have a much bigger penalty - something people getting these kind of CPUs for gaming purposes even if its a secondary purpose probably want to keep a close eye to the benchmarks for. IF's main strength over Intel's mesh, etc. systems are that they are designed for much wider and more expandable application.

Yep, i won't disagree with that Rroff. But as Intel increase the core count, inter core latency will only get worse and as it stands at the moment Mesh will make no difference to that increase. With IF though it wouldn't matter if a cpu had 240 cores, the latency would be the same. Plus of course as new revisions are released we can expect better IMC performance coupled with higher ram speed. That will never happen with Intel's current lineup because all core's are on one die.