K8L

[NathanE]

http://news.zdnet.co.uk/hardware/0,1000000091,39285591-1,00.htm
http://news.zdnet.co.uk/hardware/0,1000000091,39285591-2,00.htm

Seems that AMD is quite upbeat about K8L "Barcelona".

L3 cache

It's AMD's first chip with a built-in level-three cache. Cache memory can respond faster than main memory, and Intel has relied on large amounts of cache to improve its processors' performance. Each Barcelona core has its own 64KB (kilobyte) first-level data cache, 64KB first-level instruction cache and 512KB second-level cache; and the four cores together share a 2MB third-level cache, though AMD has said that size can be increased.

Core logic tweaks

AMD redesigned the Barcelona core, marking the biggest changes since the company made its 2003 transition from its 32-bit Athlon chips to the current 64-bit lineup. The magnitude of the transition is about halfway between the small tweaks AMD has made to Opteron over the years and the clean-sheet redesign Intel used in moving from NetBurst to its current Core design, Allen said.

Detail on one of the core logic tweaks

A faster floating-point engine performs mathematical calculations — long an Opteron strong suit, though not as important a part of the chip as that for integer operations. At a given clock frequency, a Barcelona core outperforms a current Opteron core by a factor of 1.8. By going quad-core, a Barcelona chip overall will provide a boost factor of 3.6, Allen said.

I think it will be a quicker than the competition at launch day but I don't think it will last long at all. Now that AMD and Intel both have architectures with similar IPC's it really comes down to "who has the best manufacturing process". And that is Intel with 45nm coming online this year.

 

[Mr Paul]

Intel still need to move to SOI

AMD have been doing it for years.

 

[NathanE]

Eh? So have Intel, except that Intel calls their version of it "high-k gate dilectric" and they have a few other names too for other variants of it

See also: http://softwareforums.intel.com/ISN/Community/en-US/forums/thread/980175.aspx

 

[matja]

SOI is nothing new to Intel - they made lots of 386SL/486SL CPU's using Silicon on Sapphire (SOS), which are a type of SOI for the space industry over 10 years ago

 

[Defcon5]

Will the l3 cache remove the need for low latency memory?

 

[NathanE]

To some extent but only in certain situations. Improved pre-caching (as employed by C2D) is a much better solution. I've read before that K8L does have improved pre-caching, but no details on this yet

 

[jaykay]

look fast are they imploying the kl8 desing into dual cores? or just quad core

 

[manoz]

look fast are they imploying the kl8 desing into dual cores? or just quad core

Think it's quad core at the mo, later they'll most likely release a cheaper dual core based on it for desks and notebooks. Can't wait, my 2 socket Fs are itching for a couple of quad cores.