Memory Dividers

Mortster · 12 May 2007 at 09:34

Hi Guys,

With my P5b deluxe I have the option of 1:1, 4:5, 2:3 and some other ones! for setting the ratio of FSB

RAM.

I am currently running an E6300 @ 3.2 by using a 460MHz FSB. I am running my RAM at DDR2-920 (1:1).

I have the option (at this FSB) to run memory at DDR2-920 (1:1), DDR2-1150 (4:5) and DDR2-1380 (2:3).

Can anyone explain to me the benefit of selecting the higher (async) dividers ? If I select 4:5 and run my RAM at DDR2-1150 how can the increased bandwidth benefit me if the FSB is still running at 460 ? Surely the RAM can only communicate at the same speed as the FSB, so is there any real world benefit of running greater than 1:1 ?

SkeeterUK · 12 May 2007 at 11:25

I think its best to keep it at 1:1 mate.

WJA96 · 12 May 2007 at 11:39

Mortster said:
Can anyone explain to me the benefit of selecting the higher (async) dividers ? If I select 4:5 and run my RAM at DDR2-1150 how can the increased bandwidth benefit me if the FSB is still running at 460 ? Surely the RAM can only communicate at the same speed as the FSB, so is there any real world benefit of running greater than 1:1 ?

You are aware that RAM speed is a combination of the FSB (the bandwidth) and the RAM timings themselves?

If you are running CAS4 at 920MHz then every second the RAM can be read from a maximum of 230,000 times (note that unless the Write Refresh (tRW) figure is the same as CAS, writing could be slower than reading).

If you can increase the bandwidth to 1150MHz and maintain the CAS4 timing, then you can theoretically read from the RAM 287,500 times per second. This is a worthwhile improvement. However, if you have to slip to CAS5 then the number of opportunities to read the RAM drops back to 230,000 so you lose some benefit. However, you will be polling the RAM more often so the chances of making one of those 230,000 opportunities useful is higher, so the higher bandwidth is still better.

So, in bullet points;

If you can improve the RAM speed without slackening the timings, then do it - it is worthwhile

If you have to slacken the timings off to get the extra badwidth, the improvement will almost certainly be negligible (although you may notice an improvement in SuperPi).

Hopefully that makes sense.

Mortster · 12 May 2007 at 14:22

Thankyou very much. That is a really insightful reply.
I can understand now that it's more about opportunity and increasing the rate of that opportunity so that RAM can be read more quickly.

Time to do some everest/sandra memory benchmarks to see how I gain by changing to the 4:5 divider.