Row Recycle/Row Refresh

[King_Boru]

I am having a bit of trouble determining what these timings do. They are curretly set on:

Row Recycle Time - 16T

Row Refresh Cyc Time - 24T

These seem a little high to be honest. Should they not be lower?

 

[King_Boru]

Bump

Kinda getting on my ticks not knowing what effect this is havng on my system. The Row Refresh Cyc Time is on 24T which is the highest possible setting (4t - 24t) it just doesnt seem right. Surely someone in the know can point out how it works please.

 

[Skeme]

I am having a bit of trouble determining what these timings do. They are curretly set on:

Row Recycle Time - 16T

Row Refresh Cyc Time - 24T

These seem a little high to be honest. Should they not be lower?

Row Cycle Time (tRC) and Row Refresh Cycle Time (tRFC) influence bandwidth and stability, the lower the value the better.

As a rule of thumb:

tRC = tRAS + tRP

tRFC = 3 or 4 clks higher than tRC

 

[King_Boru]

Lovely thanks for that.

Just to try and get things into perspective (never been up on all the memory names)

I am using the following settings;

2.5 - 4 - 7 - 4

In terms of names this would be?

CAS - tRAS - tRP - tRCD

Is that correct?

 

[smids]

Lovely thanks for that.

Just to try and get things into perspective (never been up on all the memory names)

I am using the following settings;

2.5 - 4 - 7 - 4

In terms of names this would be?

CAS - tRAS - tRP - tRCD

Is that correct?

No, that's CAS tRCD tRAS tRP (unless you really have set a TRAS of 4).

but the most common way of writing it is 2.5-4-4-7 1T i.e. CAS TRCP TRP TRAS.

 

[Skeme]

Well the order the appear in my BIOS is ..

CAS(tCL) - tRCD - tRAS - tRP

2.5 - 3 - 8 - 3


EDIT: smids beat me to it

 

[King_Boru]

cheers guys, that sums that up then.

 

[brocksta]

Well the order the appear in my BIOS is ..

CAS(tCL) - tRCD - tRAS - tRP

2.5 - 3 - 8 - 3


EDIT: smids beat me to it

yea for some reason, dfi have swapped a couple around in the newer boards. Got me a bit confused at first!

 

[Jimbo Mahoney]

Trc and Trfc (the timings you originally mention) are more stability timings than performance timings.

I have mine set to 15 and 17.

If you play, you will probably find they influence bandwidth VERY little (<1%) but CAN have a large impact on stability (when clocking the memory speed up).

Without looking into exactly what Trc and Trfc do, anything referring to a refresh of some sort should be regarded as a stability setting with no rules about lower or higher being better. Generally, there will be a sweet spot where higher = data loss from not being refreshed enough and lower = possible data corruption from refreshes happening too often. Refresh rates are also related to the clock speed, so again, when you increase the clock speed (of the memory), you would want to lower the refresh rate to keep it constant.

HTH?

 

[Dace]

I've got a similar memory timing question, so I may as well throw it into this thread as well (apologies to the OP).

Just got my hands on a 2gb kit of the G Skill ZX.

CAS 2
TRCP 3
TRP 2
TRAS 5

I was just wondering how to calculate the other BIOS timing settings for optimum performance. As the OP stated, 16T/24T timings seem a little high.

Is there a a memory timing calculator available anywhere where I can throw in the basic memory settings and get a complete list of optimum timings? There *has* to be one somewhere...