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Socket AM2 screws up the DDR-II clock

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Chip can't get the memory clock right


By Theo Valich: Monday 22 May 2006, 17:29

OH BOY. I can't think of many reasons why AMD would not like us to review the Socket AM2 CPU, but this reason could be a killer thing for all the reviews that will land tomorrow. Expect at least one "accidentally-leaked" marketing or sales presentation from Chipzilla where this thing gets blown out of all proportion.

It seems that AMD's memory controller has a bit of a maths problem. It has a habit of downclocking the system memory by a notch or two. Nothing serious, of course, it's just a matter of the fact that the HyperTransport divider is set at "5", and the number it is dividing is 1000. As we all know, 1000MHz is the actual clock of HyperTransport links. So, AMD works at "200" as a base, which is great if you have memory running at 200MHz, 400MHz, 600MHz, 800MHz, 1000MHz, and 1200MHz and so on.

But, if you have "shock-combo" DDR-I/II memory that runs at 333, 533, 667MHz, you could be in a bit of ruff'n'tumble. And just by accident, that DDR-II memory standard has several speed grades, including those at 533 and 667MHz.

continued:
http://www.theinquirer.net/?article=31874
 
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