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Whats Better:

They're functionally both the same other than the X3210 being clocked at 2.13GHz instead of 2.4GHz.

The G0 stepping Q6600 will clock far better then the older B3 stepping based X3210, though there is now some G0 Xeons starting to appear initial reports are that they are not as good as the C2Q variants.

Jokester
 
They're functionally both the same other than the X3210 being clocked at 2.13GHz instead of 2.4GHz.

The G0 stepping Q6600 will clock far better then the older B3 stepping based X3210, though there is now some G0 Xeons starting to appear initial reports are that they are not as good as the C2Q variants.

Jokester

i would have thought the X3210 would only support Bufferd ECC ram aswell?
 
They're functionally both the same other than the X3210 being clocked at 2.13GHz instead of 2.4GHz.

The G0 stepping Q6600 will clock far better then the older B3 stepping based X3210, though there is now some G0 Xeons starting to appear initial reports are that they are not as good as the C2Q variants.

Jokester


Thats what i needed to hear. Thanks Jokester
 
wasn't there also some blurb about how the X32xx's were supposed to have been drawn from higher-grade silicon, due to the anticipated need to run 24/7?

never really seen a real-world example to support this notion, i.e. total failure rates after endurance testing, not saying its not true though.
 
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