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AMD and Synopsys to co-design 14nm/16nm , 10nm APU, GPU products

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Advanced Micro Devices and Synopsys, a company that helps to implement complex semiconductor devices like APUs, CPUs and GPUs, this week signed a multi-year agreement that gives AMD access to a range of Synopsys DesignWare intellectual property on advanced 16nm/14nm and 10nm FinFET process technologies. In exchange, AMD transfers certain IP and engineering resources to Synopsys....

Under the terms of the agreement, AMD gains interface, memory compiler, logic library and analog intellectual property from Synopsys and will use it to develop future generations of chips to be made using 14nm/16nm as well as 10nm FinFET manufacturing processes. In addition, Synopsys hires approximately 150 AMD IP R&D engineers and gains access to AMD’s leading interface and foundation IP. While the move clearly saves AMD money, it makes it weaker in terms of resources, whereas Synopsys becomes stronger.

KitGuru Says: It looks like AMD has just transferred its fundamental IP and 150 R&D engineers to Synopsys in exchange for IP that it is going to use in the next four or five years. While the company did save a lot of money, it lost a lot of engineers and ability to develop certain technologies going forward. Does such business approach make sense? Maybe. But it looks like another form of asset-light strategy announced many years ago.

rest can be found here : Source

AMD products gonna be cheaper, and more advanced, hopefuly will catch up on Intel, also will keep the pressure on Nvidia's price and perf.
i wonder if in the light of this AMD would skip 20nm to jump directly to 16nm.
 
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So AMD have sent 150 engineers to work with Synopsys. That's good but where does that leave AMD on R&D for future products?
 
Advanced Micro Devices and Synopsys, a company that helps to implement complex semiconductor devices like APUs, CPUs and GPUs, this week signed a multi-year agreement that gives AMD access to a range of Synopsys DesignWare intellectual property on advanced 16nm/14nm and 10nm FinFET process technologies. In exchange, AMD transfers certain IP and engineering resources to Synopsys....

Under the terms of the agreement, AMD gains interface, memory compiler, logic library and analog intellectual property from Synopsys and will use it to develop future generations of chips to be made using 14nm/16nm as well as 10nm FinFET manufacturing processes. In addition, Synopsys hires approximately 150 AMD IP R&D engineers and gains access to AMD’s leading interface and foundation IP. While the move clearly saves AMD money, it makes it weaker in terms of resources, whereas Synopsys becomes stronger.

KitGuru Says: It looks like AMD has just transferred its fundamental IP and 150 R&D engineers to Synopsys in exchange for IP that it is going to use in the next four or five years. While the company did save a lot of money, it lost a lot of engineers and ability to develop certain technologies going forward. Does such business approach make sense? Maybe. But it looks like another form of asset-light strategy announced many years ago.

rest can be found here : Source

AMD products gonna be cheaper, and more advanced, hopefuly will catch up on Intel, also will keep the pressure on Nvidia's price and perf.
i wonder if in the light of this AMD would skip 20nm to jump directly to 16nm.

Looks like a partnership to me, AMD transferred Engineers and gave access to their IP to ATI in creating the HD 4000 and HD 5000 series before buying them out.
 
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We've pretty much had this discussion before. It's better to have 150 guys at Synopsys, who work purely on tape outs, are paid by Synopsys, who work on many more tape outs than they would working purely at AMD.

AMD gets to pay for those guys to work on their tape outs, but those engineers are more experienced because they work on multiple products and they aren't being shared with other projects. Those 150 guys at AMD might work on 2 tape outs a year at AMD, and be working on other projects for 9 months of the year. At Synopsys they will work on 20 tape outs a year for the entire year and AMD effective hire them for 3 months a year they need them. Better more specialised engineers AND they pay less for them, it's win win.

With the money saved on these guys who effectively aren't specialists, they can hire other guys to work in other areas for the entire year who will also be more specialised.

A team working on 2-3 tape outs a year will never have the same experience as a team who work on 20-30 tape outs a year. The cost of taping out has also MASSIVELY increased at 20nm, tape outs are longer, more complex with many more layers, much much more expensive mask sets. There is a time with most things where it is affordable at some stage but eventually you need to pool resources and offset costs.

It used to cost 1-2billion to R&D a new process and 1-2billion to kit out a fab. With 450mm coming it will cost around 10billion to kit out a fab in new equipment and probably similar in R&D.

As everything gets more complex it makes more and more sense for EVERYONE in the industry to move their in house teams to specialised companies. AMD had their own fabs but they became to expensive, Samsung are finding it too expensive to go alone hence their partnership with GloFo to produce a second source, Samsung didn't want to build a new fab elsewhere in the world, this was the cheaper option. IBM are spinning off their foundries, Intel is become a foundry with more customers added at each process node now. No one, Intel, Samsung, AMD, no one can afford to do it all alone now.
 
AMD teams with Synopsys IP for 14/16nm APU/GPU products, teases 10nm

AMD partners up with Synopsys IP, pushing toward 14/16nm APU and GPU designs, as well as future 10nm APU/GPU products (NYSE:AMD)

AMD has announced a new multi-year agreement with Synopsys IP that will see the chipmaker receiving a slew of Synopsys DesignWare intellectual property on its advanced 16/14nm technologies, as well as its upcoming 10nm FinFET technology. AMD will be handing over specific IP and engineering resources to the company. Considering NVIDIA just catapulted it's more-than-impressive GeForce GTX 900 series, there's never been a better time for AMD to partner up with someone who can handle the move to smaller processes.

The agreement sees AMD securing interface, memory compiler, logic library and analog IP from Synopsys, where it will use these technologies to create future generations of its chips on the 14nm and 16nm FinFET manufacturing process, eventually moving onto the 10nm process down the track. Synopsys will reportedly hire around 150 of AMD's IP & R&D engineers and receive access to AMD's leading interface and foundation IP. AMD will be saving money with this deal, but provides some holes in its resources, while Synopsys is only gaining from this deal.

If you've never heard of Synopsys, they are a leading power in silicon-proven IP for advance process technologies, with the company helping chip designers on a broad range of high-end IP for integration into system-on-chips, or SoCs, as well as delivering expert technical support. This power allows companies like AMD to come to them, in order to save money on pumping into their own R&D. But, AMD still packs a punch when it comes to the complex IP used in advanced microprocessors and GPUs. AMD will gain silicon-proven IP for its chips over the coming years, while handing over interface and foundation IP, as well as engineers to Synopsys, something the company explains will give it the ability to "focus its valuable engineering resources on its ongoing product differentiation and IP reuse strategy".

AMD's senior VIP and CTO, Mark Papermaster, talked about the deal with Synopsys, where he said: "Today's announcement aligns with AMD's continuing IP development strategy to focus our internal teams on designing the innovative 64-bit processor, graphics and peripheral IP that forms the foundation for our competitive differentiation, while leveraging Synopsys, the industry leader for cost-effective development of complementary standard IP components, for our future SoCs. We have partnered with Synopsys for tools and IP for more than a decade, and this expanded relationship is a great example of leveraging high-quality, standard IP for cost-effective reuse across multiple solutions".

http://www.tweaktown.com/news/40244...-16nm-apu-gpu-products-teases-10nm/index.html
 
Wouldn't get too excited about 10nm - currently most companies definition of "10nm" is anything below 19nm planar - so "10nm finfets" is probably "something" like 18nm lithography. (So likely to be some power saving but probably not huge implications for performance).
 
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However, TSMC are still claiming fairly big benefits across the board for their "crypto-20nm" processes. What should be interesting is 7nm with Germanium. Looking forward to see how the foundries cope from this point on.
 
Wouldn't get too excited about 10nm - currently most companies definition of "10nm" is anything below 19nm planar - so "10nm finfets" is probably "something" like 18nm lithography. (So likely to be some power saving but probably not huge implications for performance).

Names have been nonsense for a long time, yet are still used in order to try and convey the rough electrical advantage of a process.

20nm-14nm are effectively the same things but the huge power saving from finfets is going to give the electrical characteristics that moving from planar 20 to 14nm would give.

Ultimately the name doesn't matter, it's just an indication they see it as a large step in performance benefit that it isn't a evolution of an old process but a revolution.

There have been many jumps in the past that have had an inaccurate name but for various reasons have given a large boost in performance for some reason, adding finfets or various other things over the past decade.

I would be very surprised if their 10nm processes didn't offer large and very noticeable performance benefits over a 14nm-16nm named process.

Most processes evolve over their lifespan and yet don't get renamed. First iteration of 28nm at Glofo was really around a 28nm, second was closer to a 26nm and third was 24-23nm and very very close to what Intel were doing transistor size wise, yet it wasn't renamed. Almost every process will get 10-15% denser and drop later redesigns can save huge amounts of power(if you want to put the time and money into a process right before you leave it... which most don't). I can't remember a new process with a name indicating a large performance jump hasn't provided it.
 
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