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Intel Nova Lake (16th gen) on next gen platform/socket (LGA-1954)

Intel Nova Lake-S chipset said to measure 24×25 mm​


Nova Lake can't come soon enough for Intel. The upcoming Arrow Lake refresh will not get close to Zen5 X3D and will probably still be slower than Raptor Lake in games.

At 600m^2 its the same size as a 4090. :cry:

This is going to be expensive.... its about $250 just to print the die.
 
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At 600m^2 its the same size as a 4090. :cry:

This is going to be expensive.... its about $250 just to print the die.
Yeah and people wonder why motherboards are so expensive these days. Hopefully Intel will at least move to PCI-E 6.0 to lessen the blow and give people a reason to switch to Intel.
 
  • Core Ultra 9 - 16 P-Cores + 32 E-Cores + 4 LP-E Cores (150W)
  • Core Ultra 7 - 14 P-Cores + 24 E-Cores + 4 LP-E Cores (150W)
  • Core Ultra 5 - 8 P-Cores + 16 E-Cores + 4 LP-E Cores (125W)
  • Core Ultra 5 - 8 P-Cores + 12 E-Cores + 4 LP-E Cores (125W)
  • Core Ultra 5 - 6 P-Cores + 8 E-Cores + 4 LP-E Cores (125W)
  • Core Ultra 3 - 4 P-Cores + 8 E-Cores + 4 LP-E Cores (65W)
  • Core Ultra 3 - 4 P-Cores + 4 E-Cores + 4 LP-E Cores (65W)
Hope Core Ultra 7 with 14 P-Core + 24 E-Cores + 4 LP-E Cores will have big performance upgrade from my 14700K with 8 P-Cores + 12 E-Cores.
 
I would have preferred:

Ultra 9: 16/32/4
Ultra 7: 12/24/4
Ultra 5: 8/16/4
Ultra 3: 6/8/4

4 core i3 needs to die and the Ultra 9 is going to be like the 285K: rendered pointless by the 7.
 
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  • Core Ultra 9 - 16 P-Cores + 32 E-Cores + 4 LP-E Cores (150W)
  • Core Ultra 7 - 14 P-Cores + 24 E-Cores + 4 LP-E Cores (150W)
  • Core Ultra 5 - 8 P-Cores + 16 E-Cores + 4 LP-E Cores (125W)
  • Core Ultra 5 - 8 P-Cores + 12 E-Cores + 4 LP-E Cores (125W)
  • Core Ultra 5 - 6 P-Cores + 8 E-Cores + 4 LP-E Cores (125W)
  • Core Ultra 3 - 4 P-Cores + 8 E-Cores + 4 LP-E Cores (65W)
  • Core Ultra 3 - 4 P-Cores + 4 E-Cores + 4 LP-E Cores (65W)
Hope Core Ultra 7 with 14 P-Core + 24 E-Cores + 4 LP-E Cores will have big performance upgrade from my 14700K with 8 P-Cores + 12 E-Cores.


I think the Core Ultra 9 385k (52core) will be able to match or most likely beat the 9950X3D in most workloads. Problem for Intel though is that Nova Lake isn't due out until 2026 so will be going up against Zen6.

At least we'll have some competition to look forward to next year. The last few years have been very boring with Zen4 and Zen5 X3D just being so much better than Intel for gaming and for the majority of applications.
 
Zen 6 has 24 normal cores and 2 efficiency cores inn the IO die.

I think Nova Lake S will beat it in MT but the thing is the size of a 4090, over 600mm^2, it will not be £550, it will be more expensive than that, i think this is what Intel's CEO means when he says Nova Lake S will be over 50% margins, its going to be expensive.
 
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This is where I am right now, not sure what to do, think I might wait for Zen 6 and Nova Lake-S to come out and just do one massive upgrade... @humbug I take it the 24 normal cores on the Zen 6 will have HT right?
 
This is where I am right now, not sure what to do, think I might wait for Zen 6 and Nova Lake-S to come out and just do one massive upgrade... @humbug I take it the 24 normal cores on the Zen 6 will have HT right?

Yes, like P-Cores with HT, so 48 threads, the efficiency cores are just two cores that sit in the IO die for low power background operations. Effectively its an all big 24 core 48 thread CPU. The two little cores aren't going to add much.
 
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ONdASm8.png


Back to 15% improvement over Intel 3 (last year they gave a more conservative number) at ISO-Power. AP should provide another 5%.

At 1.1V, 25% more frequency.

Process seems very good, and if it's healthy it's up to the design team to not drop the ball.
 
Still think they are going the wrong direction with dropping HT - E cores are only so applicable when mixed with faster cores unless Intel gets off its arse and actually supports APO and updates it with optimisations for a broad range of titles.
 
Still think they are going the wrong direction with dropping HT - E cores are only so applicable when mixed with faster cores unless Intel gets off its arse and actually supports APO and updates it with optimisations for a broad range of titles.
I used to think that way but I remember reading an article about it that changed my mind.

The question really is if you go the AMD route, same arch but stripped down, or the Intel route, different archs. Or if x86 even has an option.

But for mobile you need low power cores to extend battery life. Rumour is apple will be integrating their low power cores to the new apple watch chip to extend battery life. Node shrinks just do not cut it anymore.
 
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At 600m^2 its the same size as a 4090. :cry:

This is going to be expensive.... its about $250 just to print the die.

It's not 600 m² in terms of silicone, it's the total PCB size with the chipset on it. In terms of silicone, it's a lot less. Look at the current Z890, for example:

ILrK2zT.jpeg


4090 silicone for example:

4RdYFjK.jpeg
 
imo ht is bad and ecores are bad, there should only be pcores, all cores should be identical.
if I was intel that's what I'd do anyway.
The latest Intel designs are forward looking and modern, having a mix of cores has been the standard for phones and mobile devices for over a decade now there's no reason why Desktop's can't benefit from this design. What is holding everyone back on the Desktop is stupid Windows and it's core management and memory management which needs an urgent overhaul.
 
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imo ht is bad and ecores are bad, there should only be pcores, all cores should be identical.
if I was intel that's what I'd do anyway.

HT can be used effectively in a wide range of applications, only has around 5% penalty on all out single threaded performance and though it is a moderate increase in power it is basically free performance which is always on the table - in reality you need a lot of E cores to offset what you lose removing HT especially in stuff like gaming as can be seen with AL where the 285K struggles in a lot of stuff to pull away from the 14700K (not just about raw performance but also cache and thread scheduling related scopes).
 
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