Actually those 7990 specs sound very achievable if it's a dual GPU board. If it's not a dual GPU board then you'll need a chip with roughly 2x the area of a 6970 to achieve something similar.
Photolithographic processes are specified on the basis of nanoscale design of MOSFET spacing. ITRS (http://www.itrs.net/) sometimes uses different (but essentially eqiivalent) criteria. With a shift from 40nm to 28nm you can expect exactly double density circuits and much lower power consumption (it takes fewer electrons or holes acting on transitor gates to switch or amplify drain-source currents at 28nm than it does at 40nm).
So in actual fact, the slide actually sounds extremely realistic for a 28nm version of the 6990, given that they actually do 28nm nanoscale designs. There are additional complexities designing at this level. It's not like selecting the entire MOS mask and shrinking it on something like ModelSim.
Photolithographic processes are specified on the basis of nanoscale design of MOSFET spacing. ITRS (http://www.itrs.net/) sometimes uses different (but essentially eqiivalent) criteria. With a shift from 40nm to 28nm you can expect exactly double density circuits and much lower power consumption (it takes fewer electrons or holes acting on transitor gates to switch or amplify drain-source currents at 28nm than it does at 40nm).
So in actual fact, the slide actually sounds extremely realistic for a 28nm version of the 6990, given that they actually do 28nm nanoscale designs. There are additional complexities designing at this level. It's not like selecting the entire MOS mask and shrinking it on something like ModelSim.