Soldato
- Joined
- 18 Oct 2002
- Posts
- 6,672
I've been scouring the net to find decent links to try to learn about memory timings.
I'm sure many people feel the same way - that memory timings are something of a black art - and it would be nice to have an idea of what the timings actually do and an idea of how to set them.
So far I have the following information for guidelines to set timings for guaranteed stability - i.e. a starting point at which to work down to tighter timings:
tRAS >= tCL + tRCD
or
tRAS >= tCL + tRCD + tRP
(Various sources, which make sense looking at the memory cycle - you don't want tRAS to be too low otherwise it will close too early, leading to data corruption)
tRC = tRAS + tRP
or
tRC = tRAS + tRP + 2
(Various sources)
tRFC = 195/(1000/memory clock speed) for 2GB
tRFC = 327.5/(1000/memory clock speed) for 4GB
e.g. for 2GB @ 400Mhz = 78
This is probably far too high for performance, but be aware the it can be quite critical for stability, especially with more memory.
(Source = http://www.samsung.com/global/busin...ds/applicationnote/app_note_trfc_20040506.pdf)
tREF = 7800/(1000/memory clock speed)
e.g. @ 400 Mhz = 3120
(Makes sense if the memory refresh should be 7.8us, as most are - some modules are 3.9us, so substitute 3900 instead of 7800). Unlike most timings, higher is better in terms of performance.
The secondary timings and how to set them are a complete mystery to me at the moment.
Anyone have any useful links or datasheets or whatever?
EDIT:
tRRD = 10/(1000/memory clock speed)
e.g. @ 400 Mhz = 5
(Source - http://download.micron.com/pdf/technotes/ddr2/TN4709.pdf)
I'm sure many people feel the same way - that memory timings are something of a black art - and it would be nice to have an idea of what the timings actually do and an idea of how to set them.
So far I have the following information for guidelines to set timings for guaranteed stability - i.e. a starting point at which to work down to tighter timings:
tRAS >= tCL + tRCD
or
tRAS >= tCL + tRCD + tRP
(Various sources, which make sense looking at the memory cycle - you don't want tRAS to be too low otherwise it will close too early, leading to data corruption)
tRC = tRAS + tRP
or
tRC = tRAS + tRP + 2
(Various sources)
tRFC = 195/(1000/memory clock speed) for 2GB
tRFC = 327.5/(1000/memory clock speed) for 4GB
e.g. for 2GB @ 400Mhz = 78
This is probably far too high for performance, but be aware the it can be quite critical for stability, especially with more memory.
(Source = http://www.samsung.com/global/busin...ds/applicationnote/app_note_trfc_20040506.pdf)
tREF = 7800/(1000/memory clock speed)
e.g. @ 400 Mhz = 3120
(Makes sense if the memory refresh should be 7.8us, as most are - some modules are 3.9us, so substitute 3900 instead of 7800). Unlike most timings, higher is better in terms of performance.
The secondary timings and how to set them are a complete mystery to me at the moment.
Anyone have any useful links or datasheets or whatever?
EDIT:
tRRD = 10/(1000/memory clock speed)
e.g. @ 400 Mhz = 5
(Source - http://download.micron.com/pdf/technotes/ddr2/TN4709.pdf)
Last edited: