The Abit IP35 doesn't allow independent NB Strap control and / or tRD (aka Performance Level, aka Static Read Delay) adjustment. It's linked to the memory divider thus:
1:1 = tRD 8
1:2 = tRD 7
1:1.25 = tRD 6
1:1.5 = tRD 5
1:1.66 = tRD 4
1:2 = tRD 3
tRD is a NB chip latency, not a memory latency per se. From my understanding of the P35 chipset and from my quick experiments with Memset, tRD seems to have more of an impact on memory performance than do the other timings. The difficulty on the IP35 is that using a memory divider increases the memory frequency at the same time as decreasing tRD.
I get significantly higher performance running 1:1.5 @ CAS 5 (memory @ 510Mhz) than I do running 1:1.25 at CAS 4 (memory @ 425 Mhz), but it's difficult to tell if this is due to the lower tRD or the higher memory frequency. My money is on the lower tRD. (This applies both to 3DMarks '01 through '06 as well as traditionally memory-hungry benches like SuperPi).
I'm not sure the memory can handle 680 Mhz (1:2 divider), although the Northbridge could also give up the ghost @ 340 Mhz with a tRD of 3, but at least if I can really slacken the memory timings, I'll help to narrow down the variables.
So, for those of you running IP35s, or presumably any other board where the tRD is lowered when increasing the memory divider, I would recommend at least trying it.
For those of you lucky enough to have independent tRD control, try lower values as this really impacts memory performance.