It's hard to quantify without an oscilloscope, since it depends on how it is implemented. The magnitude of the ringing increases with the size of voltage drop compensated for, so if llc is making up for a .5V drop it'll be a much bigger spike than if it's making up for a .05V drop. This is measurable, just turn off llc and see how big the vdroop on your board is.
The problem is that it also varies with how sharply you apply the voltage. Going instantly from 1.2V to 1.3V would take an infinitely large spike, going from one to the other over several minutes would show less ringing than the noise on the signal. So there is no way of knowing exactly how savage the ringing is without attaching a scope to the board.
The argument for llc is that this effect may be gentle enough to not matter. A guy on here watched everest hitting 2V brieflly on a 45nm quad, so it's probably more than 0.1V, especially given the limited resolution of everest. Gaidin has decided that this somehow doesn't affect x58 chipsets, so I suppose just ignoring the risk solves the problem as well.
The argument against it is that it achieves nothing that just increasing the idle voltage a couple of notches will achieve, and this is less stressful on the circuitry and less unkind to the processor. Obviously another arguement is that using it violates the specification intel design to.
The problem is that it also varies with how sharply you apply the voltage. Going instantly from 1.2V to 1.3V would take an infinitely large spike, going from one to the other over several minutes would show less ringing than the noise on the signal. So there is no way of knowing exactly how savage the ringing is without attaching a scope to the board.
The argument for llc is that this effect may be gentle enough to not matter. A guy on here watched everest hitting 2V brieflly on a 45nm quad, so it's probably more than 0.1V, especially given the limited resolution of everest. Gaidin has decided that this somehow doesn't affect x58 chipsets, so I suppose just ignoring the risk solves the problem as well.
The argument against it is that it achieves nothing that just increasing the idle voltage a couple of notches will achieve, and this is less stressful on the circuitry and less unkind to the processor. Obviously another arguement is that using it violates the specification intel design to.
