On September 18, 2007, Pat Gelsinger demonstrated USB 3.0 at the Intel Developer Forum. The USB 3.0 Promoter Group announced on November 17, 2008 that version 1.0 of the specification has been completed and is transitioned to the USB Implementers Forum (USB-IF), the managing body of USB specifications. This move effectively opens the spec to hardware developers for implementation in future products. The technology will provide a maximum bandwidth of 5.0 Gb/s (625 MB/s), and with the possibility for an optical interconnection.
USB 3.0 will remain backwards compatible with USB 2.0 as far as the Type A connector is concerned. While USB 2.0 is based on uni-directional data flow with negotiated directional bus transitions, USB 3.0 supports simultaneous bi-directional data flows through the use of dual-simplex four-wire differential signal wiring as compared to half-duplex two wire differential wiring in USB 2.0. Other interesting innovations in USB 3.0 include new power management features that support idle, sleep and suspend states. The two new differential pairs make the cable about as thick as an Ethernet cable and provide full-duplex transfers.
According to electronicdesign.com cables will be limited to 3 m at full speed. The technology is similar to PCI Express 2.0 (5-Gbit/s). It uses 8B10B encoding, linear feedback shift register (LFSR) scrambling for data, spread spectrum. It forces receivers to use low frequency periodic signaling (LFPS), dynamic equalization, and training sequences to ensure fast signal locking.
USB 3.0, which will be called USB SuperSpeed in commercial devices, is expected to be available in commercial controllers in the second half of 2009. Consumer products are expected to become available in 2010.