PLL = Phase Locked Loop.
In a very basic laymans terms, its a circuit in the processor that controls the amount of 'noise' on that given circuit. Increasing the clockspeed will increase the noise on the given circuit due to exceeding the reference clock with the overclock. Therefore raising the PLL will combat said noise by locking onto the input waveform and generating a new waveform usually utilising a multiplier to do so - hence why normally we only see multipliers being 'whole' numbers.
In overclockers terms : It helps achieve higher Front side bus as there is less movement of the voltage and its more 'precise' so to speak. I wouldn't advise going over 1.6v as this setting can easily kill cpu's. I have used upto 1.9v to achieve the 500fsb 4gig run I did with the quad but deffo woulnd't use anywhere near that setting for 24/7 use.
In a very basic laymans terms, its a circuit in the processor that controls the amount of 'noise' on that given circuit. Increasing the clockspeed will increase the noise on the given circuit due to exceeding the reference clock with the overclock. Therefore raising the PLL will combat said noise by locking onto the input waveform and generating a new waveform usually utilising a multiplier to do so - hence why normally we only see multipliers being 'whole' numbers.
In overclockers terms : It helps achieve higher Front side bus as there is less movement of the voltage and its more 'precise' so to speak. I wouldn't advise going over 1.6v as this setting can easily kill cpu's. I have used upto 1.9v to achieve the 500fsb 4gig run I did with the quad but deffo woulnd't use anywhere near that setting for 24/7 use.