Two things, firstly lets just all ignore the trolling as this thread is more about bulldozer than which past chips are great, its obvious trolling and complete rubbish.
Secondly, yes, it still is 8 cores CmdrTobs, and I've ALREADY said well before you that theres an active and purposeful reduction in the amount of FPU per core, why, because within a year there will be, 400+shaders on die, giving more FPU power than dozens of AVX units.
This is a base architecture that will be around for years, HUGE FPU power as a general architectural base, when you're a year away from increasing overall FPU power by a power of magnitude rather than by 2-3x's, is just insane.
This is why these are cores, in the next 3-4 years FPU within the "cpu core" will be an almost dead idea, some fpu power so that for a small amount of data its faster to stay within core, but for larger data its far faster to go out of the module and to a local ridiculously power FPU machine is the way forwards.
The idea that CPU's should be described as how many threads a core can always do is incorrect, and thats not what I meant, the amount of threads a CPU can ALWAYS handle every clock is a great measurement of what a core is though, and thats what we have here. A quad core can do 4 threads every clock with no issue, and can never ALWAYS do moer than 4 threads, a Bulldozer octo core/4module can always push 8 threads through. There are ALWAYS going to be 8 full interger cores to use, there will always be 2 x2 issues cores and each will have its own l1 cache, its own 2 decoders, they just sit next to each other in the same location in the module, its own schedualer, its own 128bit fpu unit, etc, etc.
Take any past 2 core chip and merge them together with the decoder units in the same block, everything side by side, you'd save transistors and it would still have ALL the functionality of dual cores.
Again, Intel will do this, all chips will push cores closer and closer together, the more, really , anything you have you HAVE to reduce communication this is how life works.
With GPU's you had, 1-2-4-8-16 pipelines, then we started getting 16 pipelines with 4 shaders on each pipeline, then we moved to blocks of shaders, then we moved to groups of blocks of shaders, the main reason, how long does it take for someone to run up and down a line of 100 people and tell them something all individually, then how long would it take if one person, told 10 people, and 10 people all told 10 more people?
Interconnect cost, communication, complexity increases dramatically the more cores you have, the more metal layers you need to have the first core contact the 8th core.
At 8 cores we're simply seeing a subdivision to decrease latency and communication time, at 16 cores we'll maybe see 4 groups of 4, at 32 we might see 8 groups of 4, at 64 cores we might see 8 groups of 8, etc, etc, etc.
This is how cores work, and have always worked, in pretty much any type of cpu/gpu, the more major units you have, the more you HAVE TO divide up the core into a more modular design.
I mean its pretty simple, a quad core without HT will be seen as 4 cores in windows, a quad core with HT will be seen as 8 cores, but for 8 threads to occur each core will have two threads per core, on an octo core without HT windows will see 8 cores with one thread available on each core.
IS a 2900xt not really 320 shaders, because they are in groups? Is a GF110 not really 512 shaders, because its in groups of 32? The idea is nonsense, we know what a shader is, and just because GPU's moved forward in natural GPu design in the ONLY WAY IT COULD, we didn't decide a Fermi was really only 16 shaders which can do 32 shader instructions within it, but we still only count it as one, its just ridiculous.
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