From the Winraid forums (modded Bioses etc)
Quote:
"Not sure where intel locked it to 10th and 11th gen, to what I understand Intel has supported extended Base Address Registers since Haswell. As long as a CPU supports above 4G BAR, which Haswell and above all do, it is solely on motherboard to facilitate the negotiation of transfer chunk size, which is what RBAR is all about. It is not about being able to access entire GPU memory (which is what AMD mislead everyone with, and above 4G decoding already did that with Vega64 and 4790k), it is about negotiating the transfer chunks above 256MB. As long as above 4G decoding is supported by all hardware components they are absolutely capable of negotiating transfer unit size, by modifying the BAR size allocated for certain operations, as both these features were part of PCIe 3.0 feature set. RBAR being optional, so motherboard manufacturers ignored it.
With PCIe Gen3.0 and above, PCIe device can have up to six 32bit BARs and two 64bit BARs as part of PCI Sig spec 3.0. This has been supported since Haswell. It is a (not so) simple matter of motherboard bios to support the negotiated size of these BARs as transfer units bigger than 256MB, that is it."