Alder Lake-S leaks

[Destination]

Agree, Rocket lake is old news.

Like most people, I'm wondering how those 8 baby cores are going to help on the desktop. But Intel have done this for a reason, it must be more than just power restricted mobile devices..
But we are talking beyond the CPU with DDR5 PCIE5 so a complete overhaul of a platform, maybe some other apps will see a solid uplift.. Just not sure we'll see it this year.

Honestly, I think they got a leak on what apple planned, or ARM planned, and followed, without quite realising what it is meant to deliver.

 

[DarkBahamut]

I don't get the reasons behind Big + Little core designed, other than to appear to have a high thread count on paper.

This is 8 big cores + HT + 8 small cores, which is better, that or 16 big cores?

For mobile they might make a little bit of sense, those smaller cores would no doubt use less power than the big ones, and if you can turn the big ones off at idle you could probably cut the idle power consumption drastically, maybe from 5 Watts to 1 Watt and with that improve battery life, but you're losing a chunk of performance vs if they were all big cores.

That not really true. It's become very apparently from the Alder-lake threads that people don't quite understand how CPUs are designed or how they deployed in the design of the chip.

Part of the problem is terminology. They aren't 'little' cores, they are efficiency cores. That's particularly important because it more accurately describes what is actually going on in the design. Efficiency cores aren't just power efficient, the efficient in the entire PPA design process. So an efficiency core that is half the size and half the power of a performance core might still deliver 65% of it's performance for example.

So when you say is 16 big or 8+8 better that's not really fair. The 16 big core would be a much larger and costly piece of silicon to produce. How about we level the playing field to 3 hypothetical CPUs with similar die sizes and therefore could be sold for the same price. Do you still want 16 'big' cores?

CPU 1: 16 big cores = 100% single-thread performance, 100% Multi-thread performance @ 100% power

CPU 2: 8 big cores + 16 Efficiency cores = 100% single-thread performance, 120% multi-thread performance @ 90% power

CPU 3: 8 super big core + 8 Efficiency cores = 120% single-thread performance, 100% multi-thread performance @ 100% total power

The CPU designers have an area budget to work to. They just aren't going to give you twice as many big cores for the same product. The use of efficiency cores allows them to deliver higher total performance within the area budget, and can allow even more area to be spent on the remaining performance cores (and therefore the use of 'small' cores can lead to increased single thread performance). My only real concern is the software stack. Mobile phones have spent nearly a decade trying to perfect the CPU schedulers to overcome the complexities of this kind of setup. These days they do a pretty good job, but how good Windows will handle it is another question. I have no concerns about the hardware though, the design idea has been proven long ago and makes complete sense for what we know of CPU design today.

 

[humbug]

That not really true. It's become very apparently from the Alder-lake threads that people don't quite understand how CPUs are designed or how they deployed in the design of the chip.

Part of the problem is terminology. They aren't 'little' cores, they are efficiency cores. That's particularly important because it more accurately describes what is actually going on in the design. Efficiency cores aren't just power efficient, the efficient in the entire PPA design process. So an efficiency core that is half the size and half the power of a performance core might still deliver 65% of it's performance for example.

So when you say is 16 big or 8+8 better that's not really fair. The 16 big core would be a much larger and costly piece of silicon to produce. How about we level the playing field to 3 hypothetical CPUs with similar die sizes and therefore could be sold for the same price. Do you still want 16 'big' cores?

CPU 1: 16 big cores = 100% single-thread performance, 100% Multi-thread performance @ 100% power

CPU 2: 8 big cores + 16 Efficiency cores = 100% single-thread performance, 120% multi-thread performance @ 90% power

CPU 3: 8 super big core + 8 Efficiency cores = 120% single-thread performance, 100% multi-thread performance @ 100% total power

The CPU designers have an area budget to work to. They just aren't going to give you twice as many big cores for the same product. The use of efficiency cores allows them to deliver higher total performance within the area budget, and can allow even more area to be spent on the remaining performance cores (and therefore the use of 'small' cores can lead to increased single thread performance). My only real concern is the software stack. Mobile phones have spent nearly a decade trying to perfect the CPU schedulers to overcome the complexities of this kind of setup. These days they do a pretty good job, but how good Windows will handle it is another question. I have no concerns about the hardware though, the design idea has been proven long ago and makes complete sense for what we know of CPU design today.

I don't know what you're disagreeing with or how its not fair? You said yourself the smaller cores are not as fast as the larger cores, i really don't care about the reasons behind it, all i care about is the result, if i get less performance from 8 Big + 8 Small than i would from 16 Big Ones there is no But But But.... don't focus on that here is a corporate marketing line, focus on that.

Less does not = more, the end/

 

[4K8KW10]

I don't know what you're disagreeing with or how its not fair? You said yourself the smaller cores are not as fast as the larger cores, i really don't care about the reasons behind it, all i care about is the result, if i get less performance from 8 Big + 8 Small than i would from 16 Big Ones there is no But But But.... don't focus on that here is a corporate marketing line, focus on that.

Less does not = more, the end/

Intel could have still offered quad cores as Core i7-10700K top parts if AMD hadn't released the Zen micro-architecture.

Don't ever expect from Intel anything different than profit in their pockets.

 

[Destination]

I think they can't make an envelope for large cores, so they have to bundle ****** up bits with what they can make, and are advertising it as useful.
Might be proved wrong, but looks like they want to go chiplet, but have no idea how to 14nm +++++++++++++ it into existence, so will go halfway and mismash until a solution arrives.

 

[henson0115]

Maybe that's what they thought amd did originally with Zen 1 and why they slated the idea, afterall they are around 5 years behind from a design pov.
Ofc I'm joking.. it am I.

 

[sideways14a]

For mobile, might be sensible - heck might even be half decent.
For desktop... er... intel still on the good crack i see.

 

[LePhuronn]

The CPU designers have an area budget to work to. They just aren't going to give you twice as many big cores for the same product.

AMD's 16 core desktop CPU enters the chat, teases its 20 core successor.

Part of the problem is terminology. They aren't 'little' cores, they are efficiency cores.

They are Atom cores, quite literally little compared to the primary cores. They aren't even the same architecture. And what exactly is an "efficiency" core? That is a term I think you've just made up, and doesn't actually make any sense.

 

[DarkBahamut]

I don't know what you're disagreeing with or how its not fair? You said yourself the smaller cores are not as fast as the larger cores, i really don't care about the reasons behind it, all i care about is the result, if i get less performance from 8 Big + 8 Small than i would from 16 Big Ones there is no But But But.... don't focus on that here is a corporate marketing line, focus on that.

Less does not = more, the end/

When the CPU goes into the design phase there is an area budget, say 150 mm^2. Shipping big cores only isn't the solution to maximum performance within that area budget because area and performance don't scale in a linear fashion (likewise with power). The point is that they haven't shipped 8+8 because they would haven given you 16 big otherwise, so saying you want 16 big is meaningless unless you are saying you just want a lower performance part? With the enlarged die area you could just ship some other higher performing configuration instead.

The design engineer doesn't give two monkeys about the profit margins, they are designing the fastest chip within the PPA goals they have been given.

 

[LePhuronn]

The point is that they haven't shipped 8+8 because they would haven given you 16 big otherwise, so saying you want 16 big is meaningless unless you are saying you just want a lower performance part?

5950X raises an eyebrow...16 cores with an all core boost of 5GHz within a 125W TDP is a "lower performing" part? Just because Intel can't achieve it doesn't mean it's not achievable.

 

[humbug]

When the CPU goes into the design phase there is an area budget, say 150 mm^2. Shipping big cores only isn't the solution to maximum performance within that area budget because area and performance don't scale in a linear fashion (likewise with power). The point is that they haven't shipped 8+8 because they would haven given you 16 big otherwise, so saying you want 16 big is meaningless unless you are saying you just want a lower performance part? With the enlarged die area you could just ship some other higher performing configuration instead.

The design engineer doesn't give two monkeys about the profit margins, they are designing the fastest chip within the PPA goals they have been given.

You do realise on Zen 3 the per core per clock performance is 30% higher than on Comet Lake? And yes they clock to 5Ghz. There are 16 of those, 32 threads. 64/128 at some point this year... Don't tell me it can't be done.

 

[DarkBahamut]

They are Atom cores, quite literally little compared to the primary cores. They aren't even the same architecture. And what exactly is an "efficiency" core? That is a term I think you've just made up, and doesn't actually make any sense.

They're physically smaller of course, it's the entire point. Arm themselves (to who big.LITTLE is a marketing term) call then high efficiency CPUs. The term 'LITTLE' is used in quote or brackets, in full capitals because it's a trademark. Intel themselves (who we are discussing here) have never used the term little at any point. Unless you can point out where they have?

5950X raises an eyebrow...16 cores with an all core boost of 5GHz within a 125W TDP is a "lower performing" part? Just because Intel can't achieve it doesn't mean it's not achievable.

Did I say anything about AMD, or are you making stuff up? It's comparing designs of what would happen if Intel shipped 8+8 or 16 cores. There are already 64 core CPUs on the market if we want to core count circle jerk.

By the way, I own a 5950X. It's a great CPU with amazing performance, but when run like for like with how Intel CPUs are run it definitely doesn't use 125 W!

 

[humbug]

They're physically smaller of course, it's the entire point. Arm themselves (to who big.LITTLE is a marketing term) call then high efficiency CPUs. The term 'LITTLE' is used in quote or brackets, in full capitals because it's a trademark. Intel themselves (who we are discussing here) have never used the term little at any point. Unless you can point out where they have?



Did I say anything about AMD, or are you making stuff up? It's comparing designs of what would happen if Intel shipped 8+8 or 16 cores. There are already 64 core CPUs on the market if we want to core count circle jerk.

By the way, I own a 5950X. It's a great CPU with amazing performance, but when run like for like with how Intel CPUs are run it definitely doesn't use 125 W!

AMD are the only ones we can compare them to here, i said they were fine for Laptop's in terms of efficiency, i get ARM's Big - Little idea and its works for its intention, but they are little more than wasted die space in high performance computing. and Zen 3 still uses much less power than Comet Lake, despite having 6 more cores.

 

[LePhuronn]

t definitely doesn't use 125 W!

TDP and power draw are not the same thing.

 

[LePhuronn]

Did I say anything about AMD, or are you making stuff up? It's comparing designs of what would happen if Intel shipped 8+8 or 16 cores. There are already 64 core CPUs on the market if we want to core count circle jerk.

"core count circle jerk"? Are you twelve?

Your entire argument is based on the 8 little cores are needed to make a CPU more efficient. Zen 2 and Zen 3 disprove that entirely, and goes to suggest just how fooked Intel are right now that they have to rely on ripping off ARM's big.LITTLE concept to somehow get their core counts to a marketable level, even if the reality (as with everything since Kaby Lake) is just a gorram lie. These teeny little ******** Atom cores are not going to do anything a low-power state "big" core can't do already, other than fuel marketing lies, make retarded fanbois like that Dave guy spaff their pants and cause Microsoft plenty of scheduler headaches.

I will go out on a limb here and say Alder Lake is going to be as much of an operation mess as Bulldozer. Here's hoping 600 series boards will have the BIOS option of just turning the little cores off.

 

[Grim5]

More leaks: Alder Lake-S and the z690 boards have a target launch date for September. This means Rocket Lake-S has just 4 to 5 months of lifespan before its rapidly replaced

 

[alec]

rapidly replaced

z590 and rocket lake not properly released, but already poised to be the shortest lifespan platform ever.
Even 10nm models who nobody can remember lasted longer.

Makes no sense.

Alder Lake is going to be as much of an operation mess as Bulldozer

More like Windows on ARM. At least Bulldozer problems could be mitigated in scheduler/game engines eventually.

 

[smilingcrow]

More leaks: Alder Lake-S and the z690 boards have a target launch date for September. This means Rocket Lake-S has just 4 to 5 months of lifespan before its rapidly replaced

March to September is 6 months.
I am not sure about rapidly replaced though as I suspect that the majority of Intel’s desktop chips will still be 14nm in 2023.
Even if 10nm is finally viable, it’s a case of how many fabs will be 10nm or will they hold more back for 7nm which they claimed last week is now on track?
With DDR5 likely to be expensive for ages that’s another reason why the 14nm chips will be attractive if you must have Intel.

 

[muziqaz]

I am yet to encounter anyone who thinks that big.little design is suited for desktops.
Everyone is Alder Lake this, Alder Lake that, and are just sleeping on Zen 4 which should show up somewhat same time, maybe a bit later

 

[philo-sofa]

Heterogenous CPU cores then. It makes a certain amount of sense. I wouldn’t expect all threads to be the same so you could economise with smaller cores; darkbahamut’s point about maximising performance for a die area with some giant, some little (or efficiently) makes sense.

This could just be the first step of many to come, as Moore’s law slows and we seek other ways to optimise: many different core sizes, specialised cores and so on.