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Intel's Haswell Architecture Analyzed in detail

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4 Jan 2011
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180
HASWELL

Anandtech has a detailed article on the changes from ivy bridge and its a big one enjoy.

http://www.anandtech.com/show/6355/intels-haswell-architecture

Massive changes from ivy.

Its also there truely first new design since conroe its a total redesign from pipleline up to cache and interconnects.

Those who read will see that the cpu has more than double the internal bandwidth of ivy bridge!
not to mention the double wide front end or improved branch decode.fetcher. decoupled L3 cache and the host of IPC (instuctions per clock) improvements. new ports 6 - 7 also a first

Its going to be a lot more than 10-15 percent over ivy a lot lot more.

read n discuss
 
Until we see actual performance figures over Ivy, we can't really say it's going to be a lot more than 10-15%.
I'd be pleasantly surprised if it was.

But the articles over 2 months old as well.
 
I would be shocked if it was not at least 30% after reading that.
true its 2 months old but was taken down for a month due to NDA and intel dont do that unless there is a lot of truth in it. anandtech is pritty reputable as well as far as early sources go.
 
No one is saying any different about guessing. We all wait to see benchmarks as always but the changes are a lot more than sandy to ivy witch was net 10-15 percent.

Its the biggest change since p4 - conroe. and last time it was night n day between conroe and p4 on performance. This is that same step change from intel so will give us a idea of next few years of cpu's from intel.
 
HASWELL

Anandtech has a detailed article on the changes from ivy bridge and its a big one enjoy.

http://www.anandtech.com/show/6355/intels-haswell-architecture

Massive changes from ivy.

Its also there truely first new design since conroe its a total redesign from pipleline up to cache and interconnects.

Those who read will see that the cpu has more than double the internal bandwidth of ivy bridge!
not to mention the double wide front end or improved branch decode.fetcher. decoupled L3 cache and the host of IPC (instuctions per clock) improvements. new ports 6 - 7 also a first

Its going to be a lot more than 10-15 percent over ivy a lot lot more.

read n discuss

What are you talking about, that is an old article and whats more it very specifically says the cpu is incredibly similar to Ivybridge, with the cpu itself almost identical, the only real changes for the end user are better branch prediction and more aggressive something or other, we're talking likely sub 5% IPC improvement.

Haswell leaves the overall pipeline untouched. It's still the same 14 - 19 stage pipeline that we saw with Sandy Bridge depending on whether or not the instruction is found in the uop cache (which happens around 80% of the time). L1/L2 cache latencies are unchanged as well. Since Nehalem, Intel's Core micro-architectures have supported execution of two instruction threads per core to improve execution hardware utilization. Haswell also supports 2-way SMT/Hyper Threading.

Yeah, untouched, same as Sandybridge... these things all say completely new from the ground up architecture.

In short, there aren't many major, high-level changes to see here. Instructions are fetched at the top, sent through a bunch of steps before getting to the decoders where they're converted from macro-ops (x86 instructions) to an internally understood format known to Intel as micro-ops (or µops).

In short no high level changes... wow, what a massively new architecture.

Haswell = Sandy/Ivy + powermanagement features + bigger IGP, that is it summed up very loosely.

Haswell SOC = Sandy/Ivy + power management features + more efficient IGP(I would assume it will be much smaller than desktop) + on die SOC crap + on die voltage regulation for even bigger power saving.

Fundamentally there won't be a big difference between a 3500k and a 4500k(assuming that as a Haswell name) if its more than 10% IPC change I'll be surprised, its likely less, probably 10-15% comes from 5% higher IPC and a clock speed bump plus gaming benchmarks giving it a bigger performance swing than other areas.

How anyone can read that article and claim its a completely new architecture I really don't know, how someone can make bold performance claims off an article saying there is almost fundamentally no performance change and an article that goes to great lengths to say that Intel is focusing almost every single effort on fighting in ultra mobile and therefore going almost exclusively over power savings, not performance, I literally don't know how its possible to come up with the idea's you have.

Re read it, then re-read it again, the again, and tell me where the performance improvements are going to come from?

Compared to Intel's current 10W chips a 10W Haswell should be able to clock up significantly higher, use significantly more power while in use but save that power due to other features. IE more performance given a device/battery size.... but still performance several times below what a desktop CPU can churn out.
 
Drunken use some common sense of course a cpu still behaves like a cpu your micro flame was very informative(not) its a dicussion on haswell not you might be wrong ill flame you cus it make me feel big. I am not saying they threw out everything that worked but they added a lot more which you seam to miss.

some Features carried over from Ivy Bridge others new
A 22 nm manufacturing process.
3D tri-gate transistors.
A 14-stage pipeline (since the Core microarchitecture).[7]
Mainstream up to quad-core.[8]
Native support for dual channel DDR3.[9]
64 kB (32 kB Instruction + 32 kB Data) L1 cache and 256 kB L2 cache per core.[10]
[edit]Confirmed new features
wider front end port 7-8
Haswell New Instructions (includes Advanced Vector Extensions 2 (AVX2), gather, bit manipulation, and FMA3 support).[11]
New sockets — LGA 1150 for desktops and rPGA947 & BGA1364 for the mobile market.[12] It is possible that Socket R3 will replace LGA 2011 for server Haswells[13][14]
Intel Transactional Synchronization Extensions (TSX).[15]
Graphics support in hardware for Direct3D 11.1 and OpenGL 4.0.[16]
DDR4 for the enterprise/server variant (Haswell-EX).[17]
Variable Base clock (BClk)[18] like LGA 2011.[19]
Supervisor mode access prevention (SMAP)[20]
[edit]Expected features
Shrink PCH[21] from 65 nm to 32 nm.
A new cache design.
Up to 32MB Unified cache LLC (Last Level Cache).[22]
Support for Thunderbolt technology.[23]
There will be three versions of the integrated GPU: GT1, GT2, and GT3. According to vr-zone, the fastest version (GT3) will have 20 execution units (EU).[24] Another source, SemiAccurate, however says that the GT3 will have 40 EUs[25] with an accompanying 64MB cache on an interposer.[26] An additional source, AnandTech, agrees that GT3 will have 40 EUs, and states there will be a version with up to 128MB of embedded DRAM, but makes no mention of an interposer.[27][28] Haswell's predecessor, Ivy Bridge, has a maximum of 16 EUs.
New advanced power-saving system.
Fully integrated voltage regulator, thereby moving a component from the motherboard onto the CPU.
 
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HASWELL

Anandtech has a detailed article on the changes from ivy bridge and its a big one enjoy.

http://www.anandtech.com/show/6355/intels-haswell-architecture

Massive changes from ivy.

Its also there truely first new design since conroe its a total redesign from pipleline up to cache and interconnects.

Those who read will see that the cpu has more than double the internal bandwidth of ivy bridge!
not to mention the double wide front end or improved branch decode.fetcher. decoupled L3 cache and the host of IPC (instuctions per clock) improvements. new ports 6 - 7 also a first

Its going to be a lot more than 10-15 percent over ivy a lot lot more.

read n discuss

At the end of the day all that matters is how fast it can tell us the answer to 1+1.
 
HASWELL

Anandtech has a detailed article on the changes from ivy bridge and its a big one enjoy.

http://www.anandtech.com/show/6355/intels-haswell-architecture

Massive changes from ivy.

Its also there truely first new design since conroe its a total redesign from pipleline up to cache and interconnects.

Those who read will see that the cpu has more than double the internal bandwidth of ivy bridge!
not to mention the double wide front end or improved branch decode.fetcher. decoupled L3 cache and the host of IPC (instuctions per clock) improvements. new ports 6 - 7 also a first

Its going to be a lot more than 10-15 percent over ivy a lot lot more.

read n discuss

No one is saying any different about guessing. We all wait to see benchmarks as always but the changes are a lot more than sandy to ivy witch was net 10-15 percent.

Its the biggest change since p4 - conroe. and last time it was night n day between conroe and p4 on performance. This is that same step change from intel so will give us a idea of next few years of cpu's from intel.

Drunken use some common sense of course a cpu still behaves like a cpu your micro flame was very informative(not) its a dicussion on haswell not you might be wrong ill flame you cus it make me feel big. I am not saying they threw out everything that worked but they added a lot more which you seam to miss.


I highlighted the relevant bits, you specifically said both, its a completely new architecture and the biggest change since P4 to Conroe, both things are absolutely 100% incorrect in any way you can imagine.

The fundamental architecture is a 4 width 14-19 stage architecture, and that has remained. THAT is the part that changed from P4 to Conroe, the fundamental architecture. every single iteration from Conroe has had significant changes. Sandy/Ivy(forget which, Ivy probably) got AVX over no AVX, and Haswell pushes that on to AVX2.

The chip has the same pieces, but some of those individual pieces are changing, tweaked. Its when all the pieces change and it doesn't have the same pieces that you have a new architecture.

This is VERY much an evolution of Ivy, its in no way a revolution, it is not a completely new architecture nor the biggest change from P4 to conroe, at all. By FAR the biggest change for Intel since P4 to conroe, was Sandy and sticking an IGP in that was not only used for graphics, but for acceleration as well, the changes to Haswell are minimal compared to Sandybridge becoming an APU in the mainstream/desktop segment.

You're pulling 30% out of the air and calling it a brand new architecture and the biggest change in donkeys years, by linking to an article that says its the SAME architecture, and lists the vast majority of fundamental design changes being power management and ultra low voltage/mobile based. The SOC is the biggest change.... but only in terms of trying to fit their desktop architecture into a SOC, they've done SOC's before, the voltage reg on chip is potentially an epic breakthrough...

You've read an article, misunderstood it, made bold claims that fly in the face of the article, and then got upset when someone mentioned you were talking rubbish.

Anandtech does a great job, you're right, all you have to do is read it. Same architecture, huge push for power saving, HUGE push to do better in the mobile market, the usual gen to gen changes. Improve the FPU unit, improve the branch predicting, improve the cache, they did that with Nehalem, Sandy, and now Haswell.

Anandtech knowing a lot about CPU architecture say 10-15%, INTEL say 10-15% but you say 30%..... I'll give you a hint who I trust over CPU performance claims....
 
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Care to expand on each of them and give a little detail to what that means?

The 2 biggest changes are moving from a 6-eu wide architecture on sb/ib to 8-eu wide architecture on Haswell, and avx2/FMA. The latter doubles Simd throughput over sb/IB. There's also transactional memory which could make Multi Threaded applications more efficient. There are also changes to the ring bus which should help igp performance. These will be the real world gains
 
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Intel are specifying parts the ultrabook makers will have to pair with their SOC to achieve 10W, which heavily implies that they'll end up in expensive ultrabooks and the like, probably heavily binned lowest power ones combined with really expensive mobo parts to achieve the power spec in the best ultrabooks and potentially less well binned higher power ones in cheaper ultrabooks. Depends which way Intel go really, they started off with truly abysmal ultrabook pricing which has come down simply because sales were poor, IE ultrabooks almost all over £1000, now with plenty of deals on £400-500 ones, not particularly good, low res screens and not insanely light(cheaper cases/cooling/etc, small ssd's with a second normal hdd rather than a bigger ssd and no hdd all saving weight but pushing prices up a lot.

A year ago I'd have said these would end up only in really expensive ultrabooks but Intel might have worked out laptops/ultrabooks/mobile is playing catch up to Apple. AS Cat said, a Jag or Atom will likely end up the far better option, Intel are moving towards soldered down mobo + cpu solutions, I'm not sure the SOC will be available to anyone useful or end up in anything cheap(not a bad thing it will likely be expensive but awesome), their latest Atom's are a monumental improvement, though will likely look less good(probably a LOT less good) against a quad core A15 on 28nm than the "massive" win for Atom that Anandtech seem to claim over 40nm Tegra 3.

As for a crushing blow to AMD, AMD APU's are already better, and will get a huge CPU upgrade with Steamroller based chips, Steamroller is a huge upgrade to the desktop, Haswell is a small upgrade in max performance, its almost entirely aimed at low power and a market AMD really can't compete in with a desktop chip, even then AMD is adding new power management/gating every generation just as Nvidia, Intel, ARM, IBM, and everyone else in the industry is doing. The biggest limiter in APU performance is single thread performance of the CPU, its holding back the GPU... giving it more CPU juice will let the GPU do even better, and the GPU's are getting an upgrade to GCN + which is a big leap for the GPU as well.

Steamroller is a bigger performance upgrade for AMD than Haswell is for Intel, it won't be as big a power reduction improvement as Haswell is though, by a long shot. But Intel's biggest performance improvements and power improvements will be coming in the 10-30W bracket, the SOC and the lowest power mobile chips, where AMD is very strong already.
 
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It looks to me that Haswel was designed more with mobile in mind than Desktop.

So was the current 22NM process Intel developed.

If anything,Haswell will probably use the improvements to further decrease the power consumption and effective TDP of the CPU section. This means,the IGP will be able to use more of the TDP headroom of the whole chip in the mobile versions.
 
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Steamroller is a bigger performance upgrade for AMD than Haswell is for Intel,

Do you actually have any proof that this will be the case or is this just your guess as to what is going to happen?

As my crystal ball seems to failing me at the moment.:D
 
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