Never seen anything close to 30-31ns with Intels mixed core chips…
Please stop post about Ringbus only CPU’s in a Ringbus and Mesh thread.
-
Competitor rules
Please remember that any mention of competitors, hinting at competitors or offering to provide details of competitors will result in an account suspension. The full rules can be found under the 'Terms and Rules' link in the bottom right corner of your screen. Just don't mention competitors in any way, shape or form and you'll be OK.
On Intel Raptor Lake, any truth to the rumors that disabling all e-cores hurts single threaded performance of the p-cores??
- Thread starter Wolverine2349
- Start date
Never seen anything close to 30-31ns with Intels mixed core chips…
Please stop post about Ringbus only CPU’s in a Ringbus and Mesh thread.
It’s not trolling. You are aware of backwards compatibility with memory? AM5 can support back to DRR3 and so can Skylake.
Soldato
- Joined
- 28 Sep 2018
- Posts
- 2,519
lol! There’s no mesh in adl/rpl. It’s all ringbus. https://edc.intel.com/content/www/u...rs-datasheet-volume-1-of-2/ring-interconnect/
Show me mesh tuning in bios for adl and rpl. @Armageus can we please kick him from
this thread if he can’t provide bios evidence for mesh tuning on adl/rpl
Again stop talking about technical aspects and stick to gut feeling rhetoric to boost your post count.
Last edited:
Don
What has Skylake (6th Generation) got to do with Raptor Lake (13th Generation)?
The backend of the P core is pretty much the same hence what Martin is seeing when comparing DDR4 to DDR5 in some workloads. Intels P and E cores are based on a long line of revisions.
Last edited:
Soldato
- Joined
- 28 Sep 2018
- Posts
- 2,519
Cores have nothing to do with mem controller whatsoever. They don’t even know it exists. This is getting embarrassing.
We are talking about bus systems. Well I was.
Soldato
- Joined
- 28 Sep 2018
- Posts
- 2,519
That’s also independent of cores. Try again.
Lol, it’s directly related to performance, but OK. I can see you’re very upset.
Last edited:
If we go back to DDR1 cas latency was 1 t1 so very low. Looking at Soc 939 and AM2 CPU performance AMD’s A64 design took a performance hit as the core hadn’t changed much at all and the higher bandwidth from DRR2 didn’t bring any performance benefit, but tighter timings did to a some extent.
It’s a similar situation again.
It’s a similar situation again.
It would be interesting to see what the low latencies DDR3 could bring, as DDR5 is a compromise in latency at lower core counts. I have some really nice 8pack DDR4 B-Die that can run really tight, but non of my AM4 can run the IF to make the most of it.
Don
Other than a jigger jaunt (TM) down memory lane, what has any of this got to do with the thread title of Disabling E-Cores?
Two different cores tuned for different memory types with different characteristics has benefits and compromises. As I said in my post that you jumped on.
Soldato
- Joined
- 14 Aug 2018
- Posts
- 3,547
Here is what the actual latency difference was going from DDR3 to DDR4 was, with an apples to apples comparison:
Where on earth is the "7-8x latency"? That would make DDR4 at outset to be ~280ns!
Once again you contribute nothing but false and incorrect nonsense to a thread then continue yet again with your "Intel compromise, atom cores etc" diatribe.
I can understand going slightly off-topic when replying to the OP's latest post or issues, or asking a question or even trying to contribute something factual to a thread but your post was non of these and only seems motivated by you seeing something that was slightly negative to AMD so then you have come with your normal criticism of Intel.
I'm struggling to see how this post was any different to some of the nonsense that Bencher used to post.
Last edited:
The P cores arch is actually good, but reliability and power consumption and signal balancing of DDR5 IMC leave a lot to be desired.
But the hybrid arch is absolute garbage and crap and has no place in the high end desktop.
Its an absolute shame and embarrassment that Intel puts those e-waste cores in all chips and you have no choice to buy any 8 core part without those e-waste cores!
I imagine if Intel actually had a die on latest arch with only 8 P cores they would be bigger and more reliable as QA would be easier.
But the hybrid arch is absolute garbage and crap and has no place in the high end desktop.
Its an absolute shame and embarrassment that Intel puts those e-waste cores in all chips and you have no choice to buy any 8 core part without those e-waste cores!
I imagine if Intel actually had a die on latest arch with only 8 P cores they would be bigger and more reliable as QA would be easier.
Don
Give it a rest please
Here is what the actual latency difference was going from DDR3 to DDR4 was, with an apples to apples comparison:
Where on earth is the "7-8x latency"? That would make DDR4 at outset to be ~280ns!
Once again you contribute nothing but false and incorrect nonsense to a thread then continue yet again with your "Intel compromise, atom cores etc" diatribe.
I can understand going slightly off-topic when replying to the OP's latest post or issues, or asking a question or even trying to contribute something factual to a thread but your post was non of these and only seems motivated by you seeing something that was slightly negative to AMD so then you have come with your normal criticism of Intel.
I'm struggling to see how this post was any different to some of the nonsense that Bencher used to post.
I’ve had even generic DDR3 running fast with timings much tighter anything close to what is possible with the best DDR4. You made decent point in that disabling P and E cores could show different between a DDR5 and DDR4 system as both will alter results, but then go to contribute nonsense and make vailed attacks as per norm.
I don’t see how comparing a DDR4 Intel system to a 7800X3D is relevant in thread about disabling E cores can improve performance. You add nothing to the thread doing this, but I guess your inner bias isn’t easy to suppress.
Soldato
- Joined
- 14 Aug 2018
- Posts
- 3,547
To be fair this was the reason I bought a 9700K as I already knew that HT was of no use to me and would only prove a more of a hindrance than a benefit for my usage.
Though I would much rather have E-cores than Hyper-Threading as shown in the articles you linked earlier in this thread, it is much more beneficial; typified by new games like Spider-man Remastered.
Did you ever get to do any tests with E-cores enabled and HT disabled?
It’s depends what you looking for in a chip. For a gaming only system that the OP seems interested in 8-10 big cores would probably be a better solution. The issues is Intel would get destroyed in tech reviews when compared to AMD.
Soldato
- Joined
- 14 Aug 2018
- Posts
- 3,547
I was answering a direct question asked of me. Which question were you answering again?
So please demonstrate or prove the 7-8x difference in latency.
Edit: That's the last thing I write in this thread as I see where you're going to take it; typical you.
Last edited: