Soldato
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It's still an RDNA3 leak thread. This thread will make you look silly if RDNA3 turns out to be MCM after all.
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RDNA 3 rumours Q3/4 2022
- Thread starter Grim5
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True, but it wouldn't be the first time
I think it's probably a good thing if RDNA3 doesn't have a multi GPU design, as AMD should be able to make the transition to 6nm and 5nm EUV more easily, release products sooner, and reduce the overall cost of the design (which should help to reduce the price for customers).
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MCM can come in a variety of different forms - "usually onto a unifying substrate" but it can be approached in other ways. Some older Voodoo cards used aspects of an MCM approach with plugin mezzanine/daughter boards which contained a whole package as multiple chips spread over the board, etc.
The bit to get excited about is when they can use approaches beyond a simple monolithic core to expand/scale on the performance without the disadvantages of SLI or CF.
EDIT: I'm somewhat generalising here as if we do see GPUs move beyond a monolithic core it may not be strictly MCM and/or we may see MCM used for some bits like this thread mentions which is not the kind of "MCM" people get excited about.
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On another note I'm not a huge fan of these infinity cache/large L3 cache approaches which AMD and also incoming nVidia cards seem to be going towards - it seems predicated on game engines using a specific approach (which some of the top name engines seem to be leaning towards currently) for resource management which more broadly may not be true and/or isn't necessarily the best approach going forward but the GPUs designed that way may push engine developers towards that kind of approach.
Plenty of reviews out there showing 6900xt and a 6950 to be on par with a 3090 or ti game dependent. Ray tracing performance is really the only metric nvidia are ahead consistently.
Yes in some cases the 6900 / 6950 XT can keep up with the top Ampere cards. But Nvidia has also been outproducing AMD massively, comparing the RTX 3000 series to RDNA 2. They need to catch up on production also.
Switching to multi GPU die MCM graphics cards would likely make production more difficult.
Switching to multi GPU die MCM graphics cards would likely make production more difficult.
Because nvdia aren't producing chips for 2 consoles, a good chunk of amds fab allocation is geared towards xbox and ps5 chip production. Not like it's hard to get an amd gpu at the moment, ps5 on the other hand is still iffy to get.
The only reason you can see RX 6800 and 6800 XTs available, is that they are still priced pretty high. Success would've been mass production of these graphics cards, to the point where AMD were keeping up with, or overtaking Nvidia. The RRP of the RX 6800 XT is officially £581.68. The other issue, is that AMD didn't make reference models available at all to some countries.
AMD have recently become much more competitive on price at the mid end, with cards like the RX 6650 XT and RX 6700 XT.
AMD have recently become much more competitive on price at the mid end, with cards like the RX 6650 XT and RX 6700 XT.
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Soldato
I suspect it will be MCM but only on prosumer cards like Firepro, still it would be cool to see MCM on a ordinary gaming level card.
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Soldato
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I think it will be a single GPU + separate IO + cache in an MCM package. So still MCM but none of the benefits that so many are excited about.
Then the prosumer will get the multiple GPU MCM like you said. Maybe even the top end gaming like 7900?
Caporegime
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Yup, sounds like it might be a tad expensive for consumer gaming cards for a gen or two and will work its way down to them.
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As Moore's law fades out, techs like MCM are inevitable. Hell, they've been used on CPUs for years. If not this generation, then the next.
Anybody know much about what 'Quantum tunnelling' is? The Wikipedia article says that "tunneling (US) is a quantum mechanical phenomenon whereby a wavefunction can propagate through a potential barrier."
What does that mean in English? That electrons can flow through parts of a circuit where they shouldn't? Or, does it refer only to 'waves' or particles?
Anyway, it's supposed to become more of an issue for transistors, beyond 5nm scaling. Although 3nm and 2nm fabrication technologies are still planned.
4nm (an improvement of TSMC's 5nm) must already be possible, as Nvidia's next gen Compute cards are using it.
This bit was interesting "Tunnelling occurs with barriers of thickness around 1–3 nm and smaller".
Link:
en.wikipedia.org
Another interesting article here about future transistor technologies from TSMC, Intel and Samsung:
semiengineering.com
What does that mean in English? That electrons can flow through parts of a circuit where they shouldn't? Or, does it refer only to 'waves' or particles?
Anyway, it's supposed to become more of an issue for transistors, beyond 5nm scaling. Although 3nm and 2nm fabrication technologies are still planned.
4nm (an improvement of TSMC's 5nm) must already be possible, as Nvidia's next gen Compute cards are using it.
This bit was interesting "Tunnelling occurs with barriers of thickness around 1–3 nm and smaller".
Link:
Quantum tunnelling - Wikipedia
Another interesting article here about future transistor technologies from TSMC, Intel and Samsung:
Transistors Reach Tipping Point At 3nm
Nanosheets are likeliest option throughout this decade, with CFETs and other exotic structures possible after that.
semiengineering.com
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Associate
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Basically in quantum physics there's always uncertainty when we measure a particle's energy levels: we cannot know a particle's true speed. One of many things that makes Quantum Physics so weird is it appears the universe has those very same constraints; it too does not, and cannot know a particle's energy levels.
A direct consequence of this is that electrons (which are a fundamental particle) occasionally speed off at bizarrely high energy levels with equally high amounts of energy behind them. If this happens several times to a piece of computing silicon, over time the barriers between logic gates are broken down. If even one of the many billions of gates on a CPU or GPU gets broken in this way, the whole thing will die.
Quantum tunnelling is why increased voltage reduces silicon lifespans, even if well cooled. Increased voltage increases the odds of crazy, silicon breaking electrons appearing. More to the point, the thinner the walls of a logic gate (i.e. the smaller the process node) the weaker they are, and commensurately more vulnerable to quantum tunnelling.
It seems like the most likely time we will see multi GPU MCM graphics cards is when Intel / TSMC and Samsung semiconductor foundries make the transition to 3nm. From what I've read, this will require the use of new types of transistors and 'exotic materials', to avoid the phenomenon known as 'Quantum Tunneling'.
If the yields on these proves poor, or the design costs are deemed to be too expensive, multi die MCM GPUs on 4/5nm fabrication processes could start to make a lot more sense.
If the yields on these proves poor, or the design costs are deemed to be too expensive, multi die MCM GPUs on 4/5nm fabrication processes could start to make a lot more sense.
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Associate
Do they need to be discrete chiplets for MCM or could they employ a similar approach to Apples M1 Ultra, effectively dies glued together with interconnects. ?
Soldato
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Can't know its position either which is where the tunnelling bit comes in it can potentially find itself somewhere it isn't supposed to be i.e. its "tunneled" out. Its how radioactive decay happens
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