Revolutionary CPU design "VISC" to make threading transparent, solve IPC woes

Zeed · 27 Oct 2014 at 09:54

Unlimited polygon is still work in progress and they plan to do 2 games next year. Lets wait and see

Martini1991 · 27 Oct 2014 at 10:11

Nutella33 said:
No we are saying this was rumoured or mentioned before bulldozers release. So its either been in dev for a while and there's something behind it or its a theoretical ambition that's becoming more realised.

Either way we won't know until it has a public working demo.

Yeah, I'm pretty sure it was BD's aim, bearing in mind we heard about BD many years before it ever launched.

If it launched with that ability, it'd have been amazing, while PD again would have been a better leap than say Ivy to Haswell.

Gazb · 27 Oct 2014 at 13:09

This could be very interesting.

I think it's another step closer to a truely unified compute core/s chip. Slap GPU cores onto this as well, and then let the virtual abstraction layer send the tasks to the different parts depending on there requirements and you'd get huge performance benefits. (Floating point calculations sent to the GPU part)
It's a bit like HSA/hUMA taken further as well.

Orangey · 27 Oct 2014 at 13:15

They say there is only a 5% hit when translating between ARM and native instruction sets. If this holds true for other ISAs then it's HSA dream come true.

humbug · 28 Oct 2014 at 02:52

Orangey said:
Yup when I first saw the headlines I immediately thought of CMT (clustered multi threading) which incidentally is being dropped in favour of traditional SMT (simultaneous multi threading) in Zen.

AMD are investors btw.

I wonder what this means for HSA/hUMA? Does it slot in neatly?

Don't know, but HSA is about connecting the GPU's Floating point operations to the CPU through an architecture known as hUMA.

I don't see how it will have any effect.

As for VISC, i'm excited about it, the notion of "oh only one thread used" is long over due to have been a thing of the past.

pandem0nium · 28 Oct 2014 at 11:16

Interesting stuff.

Virtualising graphics processors hasn't really worked out so far (lucid virtu), I hope this does better.

humbug · 28 Oct 2014 at 11:57

pandem0nium said:
Interesting stuff.

Virtualising graphics processors hasn't really worked out so far (lucid virtu), I hope this does better.

pandem0nium · 28 Oct 2014 at 16:42

humbug said:

Nice graphs, and something I've read up on.

I mean more the virtualisation of Discreet GPU's to run mismatched brands / models or to be able to switch to the igp for 2d to save power.

It's been hinted that using mantle, some tasks could be offloaded to the APU GPU. I like the sound of this, it would make Kaveri + hawaii / tonga a lot more viable as a combination.

pandem0nium · 28 Oct 2014 at 16:53

It's already been shown that they can work together:

http://forums.overclockers.co.uk/showthread.php?p=25723255&highlight=synergy+username_pandem0nium#post25723255

Orangey · 8 Oct 2015 at 23:41

Already commercializing:

http://www.eetimes.com/document.asp?doc_id=1327933&page_number=1

What a breath of fresh air to see something exciting actually make it to market for once...

eddiew · 9 Oct 2015 at 12:52

Is this essentially the 'reverse hyperthreading' that pops up now and then on t'internet?

Orangey · 9 Oct 2015 at 13:00

It takes multiple real cores/threads and spreads the load across virtual ones. So I think that fits the description.

It also has a translation layer between ISAs (eg - X86, ARM) with reportedly only a 10% hit.

eddiew · 9 Oct 2015 at 13:04

Interesting... I thought that RH was just an urban myth because it would just be too hard to work out which parts of a program could be run in parallel without the programmer having had a say in it.

Though I guess when you're down at the bits and bytes level, you could trace back the memory addresses that two 'sequential' operations needed to read/write and identify that they weren't connected and could be done in parallel instead. Feels like the overhead would be massive though... but if it works, then it's very cool

humbug · 9 Oct 2015 at 13:17

They need Intel and AMD to grant them X86 and X86_64 before they can make it to Mainstream.

mmj_uk · 9 Oct 2015 at 13:24

AMD should license this technoogy for Zen if their cores are still weak.

DragonQ · 9 Oct 2015 at 13:27

mmj_uk said:
AMD should license this technoogy for Zen if their cores are still weak.

If I read correctly, AMD are one of the backers of this company. I assume they'd still need Intel's permission before using x86-64 though.

Orangey · 9 Oct 2015 at 14:03

It was founded by Intel alums, I'm sure that will help.

Hagar · 9 Oct 2015 at 14:16

DragonQ said:
If I read correctly, AMD are one of the backers of this company. I assume they'd still need Intel's permission before using x86-64 though.

x86-64 was developed by AMD.

FoxEye · 9 Oct 2015 at 14:27

eddiew said:
Interesting... I thought that RH was just an urban myth because it would just be too hard to work out which parts of a program could be run in parallel without the programmer having had a say in it.

Though I guess when you're down at the bits and bytes level, you could trace back the memory addresses that two 'sequential' operations needed to read/write and identify that they weren't connected and could be done in parallel instead. Feels like the overhead would be massive though... but if it works, then it's very cool

I was wondering the same thing. The ops in each thread are going to be mostly sequential, so how you share a single thread between two cores without having a massive overhead, like you say, I have no idea.

humbug · 9 Oct 2015 at 15:48

Their intention is to sell the core designs IP to existing CPU manufactures, very much in the same way ARM do.

So i guess if Intel or AMD wanted it they could license the IP to make the chips themselves.

As Intel and AMD already have a cross licensing agreement there shouldn't be a problem.