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AMD Navi 23 ‘NVIDIA Killer’ GPU Rumored to Support Hardware Ray Tracing, Coming Next Year

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PG142 SKU 0 is BIGNAVI ?? or 3070ti hehe
 
abe2dd4c8be7330a331a4c3549c17c977df7af56.jpeg


PG142 SKU 0 is BIGNAVI ??
nah thats 3070S or TI

TX 3080 10GB 8nm GA102-200 PG133 / 132 SKU 10 8704 10GB G6X September 14
RTX 3070 Ti 8nm GA104-XXX PG142 / 141 SKU 10 ? 16GB G6 Listed by Lenovo
RTX 3070 SUPER 8nm GA104-XXX PG142 / 141 SKU XX ? 8GB G6 Listed by Lenovo
RTX 3070 8nm GA104-300 PG142 / 141 SKU 10 5888 8GB G6 October
 
What people flagging when they highlight 128 ROPS?

Roff posted when I posted that. Well I was always being positive more than the next guy reading between the lines. :)
 
What people flagging when they highlight 128 ROPS?

Roff posted when I posted that. Well I was always being positive more than the next guy reading between the lines. :)

Render Output Unit, the more you have the more Pixels Per Second you can push. (Pixel Fill Rate in GPU-Z)
 
Just give the 3080 killers stock on release kkthxbye
STOCK is what the problem will be after all ****** off people with preorders taht sold 2080tis cant get cards will go to buy AMD card instead and sell out in first Minute.
 
Any one selling tickets for 160 cu hype train?

What are the implications for the rest of the architecture if there are 128 ROPs? Does there need to be a minimum amount of other components to feed the ROPs? I had a quick read about how GPUs work but it's not a 5 minute job and seems to vary generation to generation.
 
What are the implications for the rest of the architecture if there are 128 ROPs? Does there need to be a minimum amount of other components to feed the ROPs? I had a quick read about how GPUs work but it's not a 5 minute job and seems to vary generation to generation.

I can only provide a general framework.. what you need to do is basically simulate the pipeline. so there are basically 3 stages:
1. cpu sends instructions to graphic card
2. graphic card loads data on vram
3. graphic card uses data on vram to generate the final output which i guess is again pushed to the vram

ROPs and CUs fall in the third stage..
So the framework to design a GPU in this stage basically entails the following:
a. estimating the set of instructions that will have to be executed on average for generating 1 frame
b. estimating storage required for executing above instructions (both inputs and outputs)
c. targeting an output rate of "x" frames per second

Now, since Nvidia and AMD must be using almost the same sample of games for estimating the required set of instructions per frame, the overall architecture from a ROP/CU standpoint should scale proportionately, just a hypothesis supported by above thought process.. not a CPU/GPU expert just a math guy
 
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