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AMD Polaris architecture – GCN 4.0
- Thread starter Boomstick777
- Start date
Mtom has a point, you could have two cards that are almost identical, one with power delivery limited to 100watts, so underclocked to 1000mhz, but then you could have the full fat 275watt version running at 2ghz (doubt AMD will get that high?). 2ghz 2560 shader chip would be mega fast would it not?
/end dreamworld
That would be incredibly wasteful.
It seems to me that unless the 1080 is a lot more than 25% more powerful compared to a TX, then that statement is unlikely to be true.
Such increases of performance happened before and that was without a process shrink. What is there to be surprised about here? Only thing surprising to me is nvidia not charging more for the 1070
Polaris is a small cheap chip anyways, its not a great waste to cut back the power on the cut down version.
Just found this.
Ofc we don't know what the Polaris arhitecture capable of, but the node can do high clock speeds.
Isn't this fake though? Since it claims 72-73% reductions in size, when it's actually ~56.5%.
People who don't know it's actuallty 20nm with Finfets, not true 14nm, would say it's ~75% because that's a 2 node drop instead of 1.
I believe they are still refining it in that aspect - last I heard it was a little behind TSMC for max clocks and a little more optimised for balanced performance/power.
Pleaaaaaaaaaase be true!! Then we know nV will release the new Ti then
If they are going to release GP100 as the new titan, which i am doubful about, then there is no chance of it releasing before 2Q next year at the earliest.
That and it would cost you a couple grand with how low the yields are.
The only way they could release it sooner tahn later is if they did a GP102 type chip that was just SP cores and a smaller chip compared to GP100. Yet still a bigger chip than GP104.
Its shows area reduction and its about right.
Area reduction is the inverse of density improvement.
One node is ~2x (or ~50% reduction). Two nodes is ~4x (or ~75% reduction)
14nm LPP is one node with some added improvements, so is meant to be ~2.3x or ~56.5% reduction.
72-73% is fake.
No, because the area is 20*20. As I said, this is 20nm with Finfet, not true 14nm.
However Samsung claim to have done a little wizardry to up the density to 2.3x instead of just 2x.
This is completely wrong man.. When a new GPU comes out its not down to AMD or Nvidia to get the full performance out of the GPU. Its down to the Devs making the games. Sure AMD and Nvidia can gain some performance, but the real work comes from the devs optimisation.
The reason why AMD 7900 and 290 is still doing well is because the Devs are now getting more from the GPU.
Its the same thing when a New console is released. It takes time for the devs to get full use out the hardware.
What will help AMD in the long run is GCN being in Consoles and Desktop this is why performance is doing well for even older cards.
Why do people think Drivers are the Be ALL to END All??
Does Nvidia and AMD make these Games?
Indeed spent the day testing overwatch on both brands, It's an incredibly well made game optimised for both.......
Its not 20nm. True its not real 14nm as well but something in between. There was a pucture showing its about the same size as the 16nm TSMC.
If they are only 50% reduction as you assume, how did nvidia put 75% more transistors/mm2 in the 1080 (7.2 billion - 310mm2) compared to the 980ti (8billion - 601mm2)?
Glad to hear that. I think Blizzard do tend to be fairly neutral - I don't think they can afford to choose a side.. Or rather they can afford not to be swayed either way.
I don't mean to come across as rude, but you're confusing your mathematical inverses here. Use area reduction, or density gain. Not both.
A 50% reduction means a 2x density gain.
A 75% reduction means a 4x density gain.
TSMC 16FF+ is a 50% reduction, so that allows for 2x (or 100%) the transistors per area.
Nvidia have managed 0.0232Bn per mm2 with the 1080 (assuming 310mm2), vs 0.0133Bn per mm2 with the 980 Ti.
This is a 74.5% increase, or 1.745x density gain. This is actually LESS than theoretically possible on 20nm, and FAR less than possible on true 14nm.
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Also this means if AMD were to use the maximum 2.3x increase possible with 14LPP, they could fit 7.1 Bn transistors in their 232mm2 Polaris 10. So only 0.1 Bn less than the 1080. So I won't count out Polaris 10 till we see the full details
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I don't mean to come across as rude, but you're confusing your mathematical inverses here. Use area reduction, or density gain. Not both.
A 50% reduction means a 2x density gain.
A 75% reduction means a 4x density gain.
TSMC 16FF+ is a 50% reduction, so that allows for 2x (or 100%) the transistors per area.
Nvidia have managed 0.0232Bn per mm2 with the 1080 (assuming 310mm2), vs 0.0133Bn per mm2 with the 980 Ti.
This is a 74.5% increase, or 1.745x density gain. This is actually LESS than theoretically possible on 20nm, and FAR less than possible on true 14nm.
---------------------------------------------------------
Also this means if AMD were to use the maximum 2.3x increase possible with 14LPP, they could fit 7.1 Bn transistors in their 232mm2 Polaris 10. So only 0.1 Bn less than the 1080. So I won't count out Polaris 10 till we see the full details
Yeah you could be right, this was what confused me, i mixed up the two.
it would be cheaper to design a smaller chip then artificially limit yields.