But her sister was a bitch who liked going down on people![]()
Not really the ships fault that the crew failed to miss a ruddy great iceberg
![Stick Out Tongue :p :p](/styles/default/xenforo/vbSmilies/Normal/tongue.gif)
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But her sister was a bitch who liked going down on people![]()
Well if the clocks are good, and the changes are working, then its really more like Volta competitor.
But lets just wait and see. AMD is trying to do one big step now, instead of two small, we shall see if they succed. If it works for them and it is beating the top Pascal then the one year on Polaris pays off, as from tge chaser (NV releases, then AMD cathes up) they will become the leader (or at least it will be a status quo in terms of they beat each others with every generation)
Not really the ships fault that the crew failed to miss a ruddy great iceberg![]()
Very true, but the claim was she was unsinkablebut down she went
And what is it they say about assumption being the mother of all **** ups?![]()
Not really the ships fault that the crew failed to miss a ruddy great iceberg![]()
People are kind of missing this point, this isn't late to compete with Pascal, they've skipped a new architecture for 2016, to bring out a Volta competitor earlier. They will now beat Volta to market by some margin and with more time spent making a HBM2 specific architecture.
Some things I mentioned before that got ignored by most.
HBM wasn't used for architectural OR bandwidth reasons on Fury X, it was used both to prove HBM1, to get production going, to show it can work, to sort out the supply chain for production of interposer chips and to get some personal feedback on how it works. This was all stuff that was effectively game changing for the industry and AMD in particular. If HBM failed, if the supply chain wasn't working, if anyone screwed up and the chips couldn't be produced then it sets back the introduction of interposers and the like by a few years. It will also take a couple years anyway to go from small scale production of one line of interposer/gpu/memory combining to a fully fledged facility that can handle the entire product stack from not just AMD but many many more customers. So it was always going to take time going from HBM Fury X in low volume to midrange + high end from AMD + entire product ranges from multiple other companies who start using HBM2.
Fury X didn't need 512GB/s nor did it use 512GB/s, internally it seemed limited to around 360-380GB/s. Still the 4GB of HBM1 likely saved around 30W over doing gddr5 at 380GB/s which made it a cooler and better card all around. EDIT_ for the record there is quite a lot of discussion going on over testing 1080/1080ti cards and finding they have no where near the full bandwidth available to them either. I'm just pointing out, internal bandwidth and architecture is the important part, not the actual number being supplied in theory by the chips externally.
Read up on chip architecture, bandwidth is pretty much the fundamental design choice that decides a chip design. Everything else is done to work within a specific bandwidth level. That means more cache, more logic, more prediction etc on a cpu to get more cpu performance out of that amount of bandwidth.
HBM2 is a complete game changer, entirely, but NOT for Fury X because the architecture was not designed for that amount of bandwidth.
I also said this next point at the time, the difficulty of hitting HBM2 is you have an existing architecture that is based around relatively low bandwidth, with it's peak efficiency probably around 250-300GB/s as the 7970/290x were designed around. If you go HBM1-2 as they did, you want an architecture designed to use 512GB/s.... but if you design that architecture, it won't scale down particularly well to use gddr5 except on significantly lower chips.
This meant AMD essentially committed to the next big architecture(Vega) being a completely different architecture designed around 512GB/s bandwidth, or like 50-60% more than GDDR5 based architectures were designed for.
They could have made an entirely new architecture based on GDDr5 for 2016, then a completely new architecture again for 2017 when HBM2 was ready in large volume.... or they could just save their cash, put out a minor update to GCN(with some of that work having been done for consoles anyway, so cheap) for 2016 to make a good lower price card and rather than spend a couple years on a short lived architecture for 2016, focus on their next 'next' gen architecture for 2017.
Yeah, AMD conceded the high end for 8-9 months, but that saves time wasting time and money releasing what is a dead end inbetween architecture and just focus on a design based around much higher bandwidth. Half the slides focus on HBM2 and a revolutionary cache hierarchy in the new architecture.
Great points
If it does perform then don't expect it to be cheap people...
AMD are gonna want seconds on your ass![]()
Hoping for £400 but I'll stretch to £500 won't be paying a penny more I'll wait for price drop. I would be even happy if they is a 290 kinder card.
Yeah I agree. My next step is 4K. So I want Vega to be somewhere between a 1080 and TXP. ideally.
I think Vega will be around 1080Ti performance at launch ...
Hoping for £400 but I'll stretch to £500 won't be paying a penny more I'll wait for price drop. I would be even happy if they is a 290 kinder card.
So even if its £500.01 you will not bite ...I am sure i have been here before and this is the part where you say yes not a penny more and i say well i will gift you the 1p so you can get it .....
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