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But DDR2 800 does run at an actual frequency of 400Mhz but transfers data 4 times per cycle.

I think you confused yourself there :)

So it should be

SDR = 200x1 = 200MHz (PC200) (although highest reached was only PC150)
DDR = 200x2 = 400MHz (PC3200)
DDR2 = 400x2 = 800MHz (PC6400)
 
Yellowbread is full of crud tbh, I doubt his claims that he actually works for Corsair tech support, If he does they must have very low standards( purple shirt standards).


Energizes post makes no sense tbh.

Why would they be wanting to lower the frequency of each generation of memory but increase the transfer rate making the final bandwidth exactly the same as the previous?

Just sounds like BS to me. Who is Energize anyway?


I think I understand now.

You have confused Energizes post.

DDR2 doesn't run "frequency x2 x2" that's just an error you your part I would say.

Since there was never an actual DDR800 spec Energize has skipped a generation and got his sums wrong.

DDR800 would at an actual frequency of 400Mhz x 2

DDR2 800 would also run at an actual frequency of 400Mhz x2 but since Jedec never changed the naming scheme for DDR2 this is where people are getting confused. DDR2 tranfers exactly double per cycle compared to DDR. So it should be called DDR2 1600,

DDR3 800 going by the unchanged naming scheme would still run at 400Mhz but again tranfers exactly double compared to DDR2 so should be named DDR3 3200
 
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helmutcheese said:
Look in CPU-Z and you will see it is 1:1

Its well known you do not need the FSB and Memory to be the same end MHZ, to do now would need DDR3.

You would need ask Intel what they use Quad Pump crap when AMD use Real Clock x 2 to get DDR Speed.

My Asus Mobo classed 1:1 as FSB same as Memory but all other APP's do not.

Its a fact you only need 677mhz Memory to match to a 1333FSB Intel CPU.

I ran a 2000FSB with Memory at 1000mhz on that POS Sticker II Formula I had, that is the correct way to run it, there is no way in Hell the Memory would have ran at 2000mhz.

The simple reason for that is.

DDR2 Memory Real clock = 167mhz x2 x2 = 667mhz (PC5300).
Intel CPU real clock = 333 x2 (DDR) = 667mhz, but its Real Clock is Quad Pumped so its 1333mhz.
Click to expand...

You're absolutely right!
1600FSB is when DDR2-800 will be needed, that's 1:1 ratio :)
 
ddr2's effective clockspeed is worked out in exactly the same way as ddr(1). actual speed (io bus)x 2.


the confusion come from the memory clock speed which runs at 1/2 the IO bus speed speed whereas ddr(1) chips run at 1:1 with the IO bus. so the memory clock speed is 200mhz for ddr2-800 (400mhz io speed), which is why people (wrongly) think ddr2 runs at fsb x2 x2. it's all on the wiki you know - no sense in arguing about it.


Overview
A 512 MiB DDR2 533 module with BGA chips. DDR2 is a 240-pin module
A 512 MiB DDR2 533 module with BGA chips. DDR2 is a 240-pin module

Like all SDRAM implementations, DDR2 stores memory in memory cells that are activated with the use of a clock signal to synchronize their operation with an external data bus. Like DDR before it, DDR2 cells transfer data both on the rising and falling edge of the clock (a technique called "dual pumping"). The key difference between DDR and DDR2 is that in DDR2 the bus is clocked at twice the speed of the memory cells, so four words of data can be transferred per memory cell cycle. Thus, without speeding up the memory cells themselves, DDR2 can effectively operate at twice the bus speed of DDR.

DDR2's bus frequency is boosted by electrical interface improvements, on-die termination, prefetch buffers and off-chip drivers. However, latency is greatly increased as a trade-off. The DDR2 prefetch buffer is 4 bits deep, whereas it is 2 bits deep for DDR and 8 bits deep for DDR3. While DDR SDRAM has typical read latencies of between 2 and 3 bus cycles, DDR2 may have read latencies between 4 and 6 cycles. Thus, DDR2 memory must be operated at twice the bus speed to achieve the same latency.

Another cost of the increased speed is the requirement that the chips are packaged in a more expensive and more difficult to assemble BGA package as compared to the TSSOP package of the previous memory generations such as DDR and SDRAM. This packaging change was necessary to maintain signal integrity at higher speeds.[citation needed]

Power savings are achieved primarily due to an improved manufacturing process through die shrinkage, resulting in a drop in operating voltage (1.8 V compared to DDR's 2.5 V). The lower memory clock frequency may also enable power reductions in applications that do not require the highest available speed.

According to JEDEC[1] the maximum recommended voltage is 1.9 volts and should be considered the absolute maximum when memory stability is an issue (such as in servers or other mission critical devices). In addition, JEDEC states that memory modules must withstand up to 2.3 volts before incurring permanent damage (although they may not actually function correctly at that level).
Click to expand...
Standard name : Memory clock : Cycle time : I/O Bus clock : Data transfers per second : Module name : Peak transfer rate
DDR2-400 100 MHz 10 ns 200 MHz 400 Million PC2-3200 3200 MB/s
DDR2-533 133 MHz 7.5 ns 266 MHz 533 Million PC2-4200 4266 MB/s
DDR2-667 166 MHz 6 ns 333 MHz 667 Million PC2-5300 5333 MB/s
DDR2-800 200 MHz 5 ns 400 MHz 800 Million PC2-6400 6400 MB/s
DDR2-1066 266 MHz 3.75 ns 533 MHz 1066 Million PC2-8500 8533 MB/s
 
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@ James.miller does 200x2x2= 800mhz for DDR2 makes sence as way I was told/read years ago and Energize's table ?

I know Wiki can be good but also be wrong.

Hmm you have edited since I posted this lol.
 
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as far as the memory clock goes, yes, you are correct. however its an internal feature that is derived from the IO clock, its not a frequency that anything else is based on.

for example, the memory clock is half the IO bus speed, the theoretcal transfer rate (being DDR or 'Double Data Rate') is twice the IO bus speed. so memory clock x2 x2 would be correct, but you dont run the ram at the speed of the memory clock. if that makes sense lol
 
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From YB (Corsair peep) :p

Look at Core Freq.

DDR2 one is 100x2x2=400

timing2.gif



http://www.lostcircuits.com/memory/ddrii/2.shtml
 
helmut the core frequency is the frequency of the memory chips, which as i explained run at 1/2 the IO speed (the speed that the memory module actually runs at).


look at the ddr2-400 specs that i posted above. you'll see that it tallies up with the chart you posted

a ddr800 module runs at 400mhz. 400mhz is 1:1 on a quad pumped '1600mhz' intel cpu.
 
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Theres technical and then theres this.. it's just boring seeing the same comments over and over and over.. Does it really matter how they come to DDR2 speeds? To anyone new to overclocking, it just adds EXTRA confusion over what actual speed you should run the suckers at in the bios. Plus this thread was supposed to be talking about some particular DDR3 modules, not DDR2..

But whatever I say...

BORING!
 
We never use core frequency.

Why the hell are we even using is as its totally irrelevant!

DDR FSB x 2 = The speed that SDR would have to run at to get the same bandwidth/speed/latancy/whatever due to the two clocks per cycle instead of single clock of SDR.

Core clock is irrelevant in this discussion as we use clock freq and data freq in clocking.

Lets make life easier by sticking to that hmmmm?
 
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