Not according to Nvidia, if you know more than them you should tell them.
They've said nothing of the sort. They've been extremely vague.
We know they won't go for a big die first ... they re-organised their SKU stepping for new architectures to avoid the fiasco they had with the cancelled 3xx line and then Fermi ever again. They launch small, sort production issues, then go bigger.
If you think they'll abandon that strategy with a new architecture, smaller process, and shift from bulk planar to FINFET, with completely new memory controller and new memory, then you're even more bananas than your posts hint at.
Moreover Pascal and the hugely delayed Volta were squarely aimed at CUDA / supercomputers ... they didn't think AMD would go for HBM this early and at this volume in consumer products / professional space.
For the BIG die Pascal, you will see Tesla long before Titan, per the original Titan. It wouldn't even surprise me if those big dies are still 28nm so they can deliver for some of the projects they have with IBM on time.
Also, TSMC have enough issues with their 16nmFF process, let alone the 16nmFF+ which is higher power and runs much bigger, lower volume chips -- if the former hasn't gone well, it's doubtful the latter will.