Not true actually.
Tiled based rasterisation will save power/temperature because it's part of the discard process (ignoring, not drawing, overlapping objects) and simultaneously increases memory efficiency. So literally less computation needs to be done if it's enabled.
This will either lower power consumption, or increase performance at the same power consumption. And also give an effect of overclocking memory speed.
And there are a bunch of other Vega-NCU features, though I don't know the technical details of how they'd effect performance and/or power consumption.
Worth noting TBR is where Maxwell got a lot of its MASSIVE perf/w increase from, despite not being on a smaller node than Kepler.
Also another thing to remember is AMD's official slides explicitly stated an increase in IPC with the NCU, and the current state of benchmarks puts it at a slight IPC-regression over Fiji and Polaris. There's marketing hype, and there's straight up lying in official presentations (which I believe they can be prosecuted by their investors over).
The numbers just don't add up, it seems crazy for all those extra transistors to be doing nothing or even detrimenting the processor (remember a FuryX shrunk to 14LPP would only be about 290mm2, and Vega is supposed to be between 480-500mm2). I'm sitting in the "something's wrong somewhere, and I want to see the proper RX Vega launch now" camp.