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AMD Polaris architecture – GCN 4.0

Associate
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4 Nov 2013
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Oxfordshire
Apparently that is the Pro card though, also it must have been some engineering test sample as the sisoft clock for it was low.

My statement still stands. If thats the Pro, then the full chip has like 3-400SP more...still would be strange to be as fast as Polaris 10 was hinted.
If it is really that fast with this low specs then the new GCN is tge real thing.
 
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Associate
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8 Jan 2014
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445
Before Fiji was launched there was a certain amount of HBM hype and GDDR5 is dead type comments so I'd find it mildly amusing if GDDR5 lived on for another generation yet.

It most likely is dead for enthusiast segment. I mean both Nvidia and AMD kinda agree on that.
 
Man of Honour
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13 Oct 2006
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91,655
Oh I agree its days are numbered but some people were talking like HBM would immediately blow it out the water which hasn't been the case and looking like won't be the case for awhile longer yet.

My statement still stands. If thats the Pro, then the full chip has like 3-400SP more...still would be strange to be as fast as Polaris 10 was hinted.
If it is really that fast with this low secs then the new GCN is tge real thing.

I think Fiji had to make some compromises to get a balance of DX11 and older and DX12 performance on 28nm that won't be the case on sub 20nm planar and may make quite a significant difference in some cases.
 
Soldato
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My statement still stands. If thats the Pro, then the full chip has like 3-400SP more...still would be strange to be as fast as Polaris 10 was hinted.
If it is really that fast with this low secs then the new GCN is tge real thing.

Well look at Fiji's theoretical performance compared to how it performs. if they have fixed shader utilisation bottlenecks and improved each shaders performance then it is perfectly feasible.
 
Caporegime
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18 Oct 2002
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32,618
Oh I agree its days are numbered but some people were talking like HBM would immediately blow it out the water which hasn't been the case and looking like won't be the case for awhile longer yet.



I think Fiji had to make some compromises to get a balance of DX11 and older and DX12 performance on 28nm that won't be the case on sub 20nm planar and may make quite a significant difference in some cases.

From recent rumours, HBM also might have a short life.
 
Caporegime
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18 Oct 2002
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33,188
I would say memory with significantly more complex logic. HBM is essentially the tick, where the interface was the new bit and they went with relatively simple memory/logic design. The tock step is to use the same interface but focus on a significantly more complex chip, lower power usage, lower latency, better/more parallel access, increased density. Will it be called HBM3 or a completely new memory type, doesn't really matter. The next memory change will be more like gddr3 to gddr5 most likely. The interesting parts of HBM are less the chips and more how it's all put together. TSVs, die stacking, interposers, very wide bus. the next gen memory will also be tsvs, die stacking, interposer and very wide bus, just a different type of chip stacked together.
 
Soldato
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Planet Earth
Back to school in the US is August to early September, June is still at school in the previous school year!I know, because I happen to live there.

First Day of School last year was September 9th, last day is June 28th. Back to school is the last couple of weeks in august first couple in September.

Nice one, July is indeed within the US back to school period.

Agreed,Dave I like how D.P. is now saying a whole load of US sales and market research sites are now wrong. He first said I was wrong about July being back to school in marketing terms and once he was proven wrong tried to say I have "issues" and "junk",ie, trying silling name calling which sadly is quite common on US forums.

He desperately tries to deflect that he was proven wrong - one third of back to school sales happen in July with nearly 2/3 of buying decisions for August made in July. If AMD does not even have a soft release with reviews in July they have essentially missed the back to school period.

Google and Ipsos research said:
Parents research and make back-to-school purchases at different times – July is all but the unofficial month for researching back-to-school products. A recent study by Google and Ipsos Research concluded that 65% of U.S. internet users started their back-to-school research in the month of July. Many of these researchers, however, waited until August to make purchases – 48% of U.S. internet users made back-to-school purchases in August, only 35% made purchases in July.

Google and Ipsos MORI are not amateurs in the market research field - July and August make up 83% of back to school sales according to them. The middle or end of August would mean AMD has missed most of the critical sales period and also missed most of the research period too.

If AMD has no reviews out in July,they might as well admit Polaris has been delayed and if Nvidia get's Pascal out earlier,then AMD is in BIG trouble IMHO.

Also,D.P., don't bother replying as I will make sure I will continue repeating post 2061 til it is blue in your face since you really have issues yourself(using your own language),and seem to know better than many US sites which I quoted. Rage at them if you feel they are giving faulty data. They are US sites after all.

We will need to agree to disagree and leave it at that. If you want the last say it is your perogative,but I will ignore it.
 
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Soldato
Joined
7 Feb 2015
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2,864
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South West
I would say memory with significantly more complex logic. HBM is essentially the tick, where the interface was the new bit and they went with relatively simple memory/logic design. The tock step is to use the same interface but focus on a significantly more complex chip, lower power usage, lower latency, better/more parallel access, increased density. Will it be called HBM3 or a completely new memory type, doesn't really matter. The next memory change will be more like gddr3 to gddr5 most likely. The interesting parts of HBM are less the chips and more how it's all put together. TSVs, die stacking, interposers, very wide bus. the next gen memory will also be tsvs, die stacking, interposer and very wide bus, just a different type of chip stacked together.

More than likely trying to improve the Latency and power use side of things, HBM already allows a vast amount of parallel access compared to what GDDR5 does.
 
Man of Honour
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Dalek flagship
You didn't have a crystal ball either so lets not go down the route of rewriting history :)

You are absolutely right I did not have a crystal ball.

I do not know much.

There are people more qualified than me on these forums.

But at least I admit it, unlike some of the people who try and waffle their way out of admitting they have got something wrong.
 
Man of Honour
Joined
21 May 2012
Posts
31,940
Location
Dalek flagship
I would say memory with significantly more complex logic. HBM is essentially the tick, where the interface was the new bit and they went with relatively simple memory/logic design. The tock step is to use the same interface but focus on a significantly more complex chip, lower power usage, lower latency, better/more parallel access, increased density. Will it be called HBM3 or a completely new memory type, doesn't really matter. The next memory change will be more like gddr3 to gddr5 most likely. The interesting parts of HBM are less the chips and more how it's all put together. TSVs, die stacking, interposers, very wide bus. the next gen memory will also be tsvs, die stacking, interposer and very wide bus, just a different type of chip stacked together.

Is this your way of admitting HBM1 was not up to the job ?
 
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