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AMD Zen 2 (Ryzen 3000) - *** NO COMPETITOR HINTING ***

Soldato
Joined
16 Sep 2018
Posts
12,708
You've just told me you don't trust anything i say, this has been the problem right from the start, you want me to go running round and round in circles proving my self to you for your amusement, you're trolling, again you've just told me you don't believe anything i say and yet you're still trying to push me into engaging with you.

Go amuse yourself else where, don't do it on my time.

Indeed i don't, that's why you should post links to information that backup your spurious claims, just because i don't trust you doesn't mean i wouldn't trust the facts, information, or evidence that you cited.

I'll take it as read though that because you're refusing to substantiate anything your saying that it was based on being ill-informed and now you realise that your trying to find a way to back-out of this conversation.
 
Soldato
Joined
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Posts
12,708
That's always a good idea, instead of making your own unsubstantiated assertion and then ask me to prove myself when i put a counter argument in, like a ####.

And what unsubstantiated assertion is that? So far I've provided a link to an article explaining how you're wrong, you've yet to provide anything other than your usual spurious claims.
 
Caporegime
Joined
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Location
ARC-L1, Stanton System
And what unsubstantiated assertion is that? So far I've provided a link to an article explaining how you're wrong, you've yet to provide anything other than your usual spurious claims.
This?

I don't anything in that which sates 12nm is drastically different to 14nm, in fact it states as i did:

My Quote.
12nm is 14nm Tweaked, the difference is minimal, the Fin and Poly pitch are identical, they have slightly smaller cells on the same substraight which gives them about 1.2X density vs the Samsung 14nm it originated.
 
Soldato
Joined
16 Sep 2018
Posts
12,708
This?

I don't anything in that which sates 12nm is drastically different to 14nm, in fact it states as i did:

My Quote.

So let me get this right, you're using the link i provided that tells you how different 12nm is from 14nm and how different they both are from the original IBM 14nm LPE to claim that 12nm is 14nm tweaked?

I'm guessing you can read so you know what that article says, you know it completely debunks your claim that...
12nm is 14nm Tweaked, the difference is minimal, the Fin and Poly pitch are identical, they have slightly smaller cells on the same substraight which gives them about 1.2X density vs the Samsung 14nm it originated.

Other than that there really is no difference, the smaller cell sizes are slightly more efficient giving you about 10% higher clocks at the same volts but they are still based on the same 3.0Ghz Samsung 14nm node, so they are now more like 3.3Ghz.
Maybe it will sink in if you have a pretty picture to look at.
vlsi_2018_12lp_fin_profile.png

Yup, just a tweak. :rolleyes:
 
Associate
Joined
27 Apr 2007
Posts
965
12nm is 14nm Tweaked, the difference is minimal, the Fin and Poly pitch are identical, they have slightly smaller cells on the same substraight which gives them about 1.2X density vs the Samsung 14nm it originated.

Other than that there really is no difference, the smaller cell sizes are slightly more efficient giving you about 10% higher clocks at the same volts but they are still based on the same 3.0Ghz Samsung 14nm node, so they are now more like 3.3Ghz.
It's probably fair to call it tweaked but I don't agree that the differences are minimal. They aren't maximal either but on reading the link posted today it's clear that they did more than the minimum with that shrink.
It was an interesting read and highlights how many parameters there are to juggle when making design decisions so thanks for the link.
 
Caporegime
Joined
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Posts
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Location
ARC-L1, Stanton System
So let me get this right, you're using the link i provided that tells you how different 12nm is from 14nm and how different they both are from the original IBM 14nm LPE to claim that 12nm is 14nm tweaked?

I'm guessing you can read so you know what that article says, you know it completely debunks your claim that...

Maybe it will sink in if you have a pretty picture to look at.
vlsi_2018_12lp_fin_profile.png

Yup, just a tweak. :rolleyes:

Good grief its a slightly taller transistor, explain how this makes it significantly different to 14nm. making it taller reduces its width, with that you can pack them closer together, 14nm vs 12nm, its how Finfets work.

You keep referring to that article but are unable to point to anything which backs you up, all you've done here is point to a picture that represents something everyone already knows without the need to see it illustrated in a picture. its a 14nm vs 12nm Fin, and? did you expect to see 12nm fins to look the same as 14nm? the fin its self contains the same volume and is laid on the same 64nm sub-straight, eveything else about it is the same, its not even a true shrink, its a modification, its about density.
 
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Soldato
Joined
6 Aug 2009
Posts
7,091
Good grief its a slightly taller transistor, explain how this makes it significantly different to 14nm. making it taller reduces its width, with that you can pack them closer together, 14nm vs 12nm, its how Finfets work.

You keep referring to that article but are unable to point to anything which backs you up, all you've done here is point to a picture that represents something everyone already knows without the need to see it illustrated in a picture. its a 14nm vs 12nm Fin, and? did you expect to see 12nm fins to look the same as 14nm? the fin its self contains the same volume and is laid on the same 64nm metal sub-straight, the pitch is the same, its not even a true shrink, its a modification, its about density.

Not wanting to sound pedantic but it's substrate. As an observer it's hard to concentrate on potentially useful factual information if basic words are wrong.

My advice guys is stick to debating the information not each other, no matter the provocation. I'm actually interested to hear what you've both got to say on the subject :)
 
Soldato
Joined
16 Sep 2018
Posts
12,708
Good grief its a slightly taller transistor, explain how this makes it significantly different to 14nm. making it taller reduces its width, with that you can pack them closer together, 14nm vs 12nm, its how Finfets work.

You keep referring to that article but are unable to point to anything which backs you up, all you've done here is point to a picture that represents something everyone already knows without the need to see it illustrated in a picture. its a 14nm vs 12nm Fin, and? did you expect to see 12nm fins to look the same as 14nm? the fin its self contains the same volume and is laid on the same 64nm sub-straight, eveything else about it is the same, its not even a true shrink, its a modification, its about density.

OMG you can't even get it right when it's written in the blooming picture, it's not a slightly taller transistor, it's a 'slightly' taller FIN.

Look it's obvious you don't know what you're talking about so I'll try explaining it to you as succinctly as i can, GloFlo and Samsung did not have their own working 14nm FinFet.

GloFlo bought IBM's global commercial semiconductor technology business that included IBM's existing 14nm plant AND the process, along with numerous semiconductor technology IPs.
It should be noted that GlobalFoundries had no such capabilities prior to their acquisition of IBM's plant, semiconductor manufacturing group, and IP portfolio.

Samsung and GLOBALFOUNDRIES Forge Strategic Collaboration
that involved sharing existing 14nm plants, processes, and numerous semiconductor technology IPs that resulted in 14LPE (14 Low-Power Early), 14LPP (14 Low-Power Plus/Performance), 14LPC (Low Power Cost [reduced]), and 14LPU (14 nm Low Power Ultimate) in that order.

The Samsung and GloFlo collaboration on the 14LPP (14 Low-Power Plus/Performance) was used for the original Zen, after that GloFlo building on top of Samsung's licensed 14nm process, announced the 12LP (12 nm Leading Performance) that Zen+ was fabricated on.

Now i know that a long complicated path but saying 12LP (12 nm Leading Performance) was a tweaked 14nm, that SS 14nm vs 12nm simply has slightly smaller cells on the same substraight which gives them about 1.2X density vs the Samsung 14nm it originated from is just incorrect, it wasn't Samsung's 14nm node it was IBM's, it isn't "A" slightly tweaked Samsung node, it changed some major elements of the 2nd generation Samsung and GloFlo collaborated 14LPP (14 Low-Power Plus/Performance) node while Samsung went on to develop another two iterations of that node.

However getting back to the original point that 12nm was a mature phone/tablet CPU node so people believe moving away from a supposed phone/tablet CPU node would result in a big (600Mhz+) jump in clockspeeds is just plain wrong, 12nm was not a phone/tablet CPU node, it was a node designed specifically for increased performance. Yes it was based on a Low-Power Plus/Performance node that was in turn developed from an early Low-Power node that was itself based on the IBM 14nm High-Performance node, but that doesn't change the fact that the node used for Zen+ was designed for increased performance, increased performance that only netted around a 200Mhz increase.

Expecting a move to 7nm to net more than a 200-400Mhz increase is setting your expectations to high IMO, especially because we're dealing with a new node vs what was a fairly mature well understood 14/12nm node.
 
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Soldato
Joined
11 Jun 2003
Posts
5,083
Location
Sheffield, UK
I reckon it'll be the weekend/into next week before we get any useful leaks from the partner meeting.
Eh, not long to go now and I don't really have a chunk to throw at this till mid-june anyway :D

Out of the announced boards so far - what's the current "lead pack" looking like? I've not gotten too deep in that yet as I'll probably just go chip to start with till I can pick a winner.
 
Soldato
Joined
26 Aug 2004
Posts
5,052
Location
South Wales
Expecting a move to 7nm to net more than a 200-400Mhz increase is setting your expectations to high IMO, especially because we're dealing with a new node vs what was a fairly mature well understood 14/12nm node.
If we get 200mhz that's rather rubbish, unless the IPC makes up for it.. We'll see soon enough.

I reckon it'll be the weekend/into next week before we get any useful leaks from the partner meeting.
If there's still no leaks by that time then there won't be much point getting them.. since just over a month til we get official info :p
 
Caporegime
Joined
18 Oct 2002
Posts
33,188
OMG you can't even get it right when it's written in the blooming picture, it's not a slightly taller transistor, it's a 'slightly' taller FIN.

Look it's obvious you don't know what you're talking about so I'll try explaining it to you as succinctly as i can, GloFlo and Samsung did not have their own working 14nm FinFet.

GloFlo bought IBM's global commercial semiconductor technology business that included IBM's existing 14nm plant AND the process, along with numerous semiconductor technology IPs.
It should be noted that GlobalFoundries had no such capabilities prior to their acquisition of IBM's plant, semiconductor manufacturing group, and IP portfolio.

Samsung and GLOBALFOUNDRIES Forge Strategic Collaboration
that involved sharing existing 14nm plants, processes, and numerous semiconductor technology IPs that resulted in 14LPE (14 Low-Power Early), 14LPP (14 Low-Power Plus/Performance), 14LPC (Low Power Cost [reduced]), and 14LPU (14 nm Low Power Ultimate) in that order.

The Samsung and GloFlo collaboration on the 14LPP (14 Low-Power Plus/Performance) was used for the original Zen, after that GloFlo building on top of Samsung's licensed 14nm process, announced the 12LP (12 nm Leading Performance) that Zen+ was fabricated on.

Now i know that a long complicated path but saying 12LP (12 nm Leading Performance) was a tweaked 14nm, that SS 14nm vs 12nm simply has slightly smaller cells on the same substraight which gives them about 1.2X density vs the Samsung 14nm it originated from is just incorrect, it wasn't Samsung's 14nm node it was IBM's, it isn't "A" slightly tweaked Samsung node, it changed some major elements of the 2nd generation Samsung and GloFlo collaborated 14LPP (14 Low-Power Plus/Performance) node while Samsung went on to develop another two iterations of that node.

Most of what you said here is wrong AND your own links prove it.

Click your Samsung and global forge strat colab link, it straight up says this

Developed by Samsung and licensed to GF, the 14nm FinFET

Full stop, that's the end of it. Anyone not bs'ing their way through basic knowledge knows that IBMs 14nm was decent but had very different design parameters, it was designed primarily for IBM chips, that is screw power efficiency, max clock speeds were the only concern, it was more expensive and was focused on producing a relatively low number of extremely high cost server chips. It was basically unsuitable for creating more efficient higher yield cheaper chips. So straight off, and this was incredibly widely and publicly known, Global dumped IBM 14nm and licenced what was a fully Samsung process node. The original Zen was made on a purely Samsung node, developed by Samsung for mobile with the focus on efficiency and being high yielding and it went into production before Global did and it was licenced by Global. Suggesting this was originally an IBM node literally immediately highlights that you don't know what you're talking about here. Here's a hint, if one company licences a node to another company... they won't launch it before the company who actually finished it then licenced it.

Secondly, the defining characteristics on size and electrical performance come from in huge part the basic parameters of a node, the basic gate pitch, metal pitch, they pretty much define the 14nm Samsung node as what it is, 12nm makes no significant changes and ignoring the headlining numbers, 12nm is 'faster' not because it's denser, but because slightly thinner taller gates allow the chip to be less dense.

Keep in mind that Intel relaxed transistor gate pitch for subsequent 14nm nodes, that's how the clock speeds went up. 14nm had a transistor gate pitch of 70nm, 14nm + didn't officially raise it but supposedly did in the design rules, 14nm++ is a transistor gate pitch of 84nm.

Intel called all their node tweaks 14nm/+/++/+++, in the past they would have called them a new stepping on a shipping chip. With ostensibly the same cpu they wanted to make the changes sound bigger than just a stepping. With Global they wanted it to sound like a bigger improvement and they gave it a new name. It used the same equipment, it used the same patterning, it has the same physical limits, it just tweaked the design, nothing more or less. On any given set of equipment and choice of patterning you are really limited to certain physical size parameters, within those limits anyone can choose to optimise for density, voltage, performance, in fact many or most nodes do that upfront and have different designs on purpose, 14nm industry nodes were really the first where they only really bothered with one design largely because Samsung planned to go 10nm before 7nm and earlier so wasting time on extra versions of 14nm apparently didn't seem worth it to them.

https://en.wikichip.org/wiki/14_nm_lithography_process

Look at Intel, they started off, before launch, with an optimised high performance, low voltage and high density library. 12nm is nothing more than a tweaked 14nm with different design goals, using the same equipment, using the same physical limitations, using the same patterning. No one in the industry would call it a new node.

Also note the IBM 14nm, it is dramatically larger despite being 14nm, because lower density = higher performance in general. This is why Intel's nodes decreased density to raise clock speeds, IBMs node was completely unsuitable for a high volume, high yield, lower cost chip and still is, also a really really big deal here, IBMs 14nm is SOI, Samsung's is bulk, no Zen chip is produced on SOI, full stop.

https://www.globalfoundries.com/sites/default/files/product-briefs/pb-14lpp.pdf

You will notice here, particularly top of the second page, twin well CMOS bulk FinFET, with every single design parameter matching Samsung 14nm and nothing matching IBMs 14nm SOI node.
 
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