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by "enthusiasts" he meant only himselfHis last bullet point is false. I can easily confirm that.
So will AM5 boards feature an external clockgen or is this likely to only be the higher end boards?.Some very good news I can share. It seems BCLK can be decoupled from PCIe this time. Will confirm any issues via testing but so far looks promising.
No clue. My focus is only on the OC focused stuff.So will AM5 boards feature an external clockgen or is this likely to only be the higher end boards?.
So somewhere around mid 50s after tuning, that's good
I think most chips will be limited to an IF clock of approx. 2000mhz (according to AMD, it's best set to Auto). I think AMD managed ~63 with decent DDR5 modules, so I've got no idea if latencies <60 will be possible on Zen 4. The reason for the small increase in latency, is apparently down to cache changes "The expansion of the L2 cache increased latency somewhat, from 12 to 14. The shared L3 cache's latency has also increased, from 46 to 50 cycles".
Hopefully, 60ns will be achievable, which was a typical latency for the 5900X and 5950X.
No one gonna question the throughput numbers? Interesting