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I didn't have my FSB/MCH voltage up at the time of that screenshot, but I've just put them to 0.1 each (Had them at 0.1 before forgot to put them back)dheyworth1981 said:Jihad
Im kinda stuck at 3.22. Any higher and its unstable and you are on less vcore than me
Have you upped your FSB or MCH voltage at all?
My Ram is set to +0.3v which is 2.1v I thinkdheyworth1981 said:I guess you got a better batch then
My MCH is at +0.1, but FSB is left alone
RAM at 2.1v and processor at 1.3625, cant go any higher
dbappa said:when people do their SuperPi tests, what level does every one do (16k, 1M etc)?
EDIT - Is 20 Secs for 1M good? 6300 @ 3Ghz (430x7 5-5-5-15).
Millwall.FC said:my e6600 @3ghz (341x9 5-5-5-12) does it in 17 seconds must be the cache
Millwall.FC said:my e6600 @3ghz (341x9 5-5-5-12) does it in 17 seconds must be the cache
vocch said:And don't forget to mention the extra cash as well lol.
LOLMillwall.FC said:£100 for a couple of seconds is well worth it
LOL thats the best ever sarcasm ever! its right in what you say though lol.Millwall.FC said:£100 for a couple of seconds is well worth it
[b]Genie BIOS Settings:[/b]
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Genie BIOS Setting:
Exit Setup shutdown....................... - Mode 2
CLOCK VCO divider......................... - Auto
CPU Clock Ratio........................... - 9 X
- Target CPU Clock........................ - 4203 MHz
CPU Clock................................. - 467 MHz
Boot Up Clock............................. - Auto
DRAM Speed................................ - 333/667
- Target DRAM Speed....................... - DDR2 935
PCIE Clock................................ - 105 MHz
PCIE Slot Config.......................... - 1X 1X
CPU Spread Spectrum....................... - Disabled
PCIE Spread Spectrum...................... - Disabled
SATA Spread Spectrum...................... - Disabled
CPU Feature:
Thermal Management Control................ - Disabled
PPM(EIST) Mode............................ - Disabled
Limit CPUID MaxVal........................ - Disabled
C1E Function.............................. - Disabled
Execute Disable Bit....................... - Disabled
Virtualization Technology................. - Disabled
Core Multi-Processing..................... - Enabled
Voltage Setting:
CPU VID Control........................... - 1.6V
CPU VID Special Add....................... - 101.65%
DRAM Voltage Control...................... - 2.15V
SB 1.05V Voltage.......................... - 1.15V
SB Core/CPU PLL Voltage................... - 1.50V
NB Core Voltage........................... - 1.55V
CPU VTT Voltage........................... - 1.45V
Vcore Droop Control....................... - Disabled
Clockgen Voltage Control.................. - 3.45V
GTL+ Buffers Strenght..................... - Strong
Host Slew Rate............................ - Weak
GTL REF Voltage Control................... - Enabled
CPU GTL 1/3 REF Volt..................... - 110
CPU GTL 0/2 REF Volt..................... - 110
North Bridge GTL REF Volt................. - 110
DRAM Timing:
Enhance Data transmitting................. - Fast
Enhance Addressing........................ - Fast
T2 Dispatch............................... - Auto
CAS Latency Time (tCL).................... - 4
RAS# to CAS# Delay (tRCD)................. - 4
RAS# Precharge (tRP)...................... - 4
Precharge delay (tRAS).................... - 12
All Precharge to ACT...................... - AUTO
REF to ACT Delay (tRFC)................... - 24
Preformance LVL (Read delay).............. - AUTO
MCH ODT Latencey.......................... - AUTO
Write to PRE Delay (tWR).................. - AUTO
Rank Write to Read (tWTR)................. - AUTO
ACT to ACT Delay (tRRD)................... - AUTO
Read to Write Delay (tRDWR)............... - AUTO
Ranks Write to Write (tWRWR).............. - AUTO
Ranks Read to Read (tRDRD)................ - AUTO
Ranks Write to Read (tWRRD)............... - AUTO
Read CAS# Precharge (tRTP)................ - AUTO
All PRE to Refresh........................ - AUTO
Clock Setting Fine Delay:
Ch1 Clock Crossing Setting................ - More Aggressive
DIMM 1 Clock fine delay................... - Current[14]
DIMM 2 Clock fine delay................... - Current[ 5]
Ch1 Command fine delay.................... - Current[ 9]
Ch1 Control fine delay.................... - Current[ 5]
Ch2 Clock Crossing Setting................ - More Aggressive
DIMM 3 Clock fine delay................... - Current[13]
DIMM 4 Clock fine delay................... - Current[ 4]
Ch2 Command fine delay.................... - Current[10]
Ch2 Control fine delay.................... - Current[ 4]
Ch1Ch2 CommonClock Setting................ - More Aggressive
Ch1 RDCAS GNT-Chip Delay.................. - Auto
Ch1 WRCAS GNT-Chip Delay.................. - Auto
Ch1 Command to CS Delay................... - Auto
Ch2 RDCAS GNT-Chip Delay.................. - Auto
Ch2 WRCAS GNT-Chip Delay.................. - Auto
Ch2 Command to CS Delay................... - Auto
Read delay phase adjust:
Channel 1 Phase 0 Pull-In................. - Auto
Channel 1 Phase 1 Pull-In................. - Auto
Channel 1 Phase 2 Pull-In................. - Auto
Channel 1 Phase 3 Pull-In................. - Auto
Channel 1 Phase 4 Pull-In................. - Auto
Channel 2 Phase 0 Pull-In................. - Auto
Channel 2 Phase 1 Pull-In................. - Auto
Channel 2 Phase 2 Pull-In................. - Auto
Channel 2 Phase 3 Pull-In................. - Auto
Channel 2 Phase 4 Pull-In................. - Auto
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