Although Roff has a point about the design costs shooting up for sub-20nm processes, on the flip side Nvidia can only get 1 working V100 chip per wafer because it's 825mm2. If they built it on 7nm it'd be more like 500mm2, so they could produce in the 10s per wafer (since chip failure is an exponential increase with die size). This would likely outweigh the extra R&D cost.
I'm not sure how they are producing the big Volta chip - TSMC supports multiple different products per wafer and I believe to a higher level of complexity than other foundries - part of why they are only getting "one" per wafer may be due to having a low number of the big core per wafer and filling out the extra space with smaller products depending on what would be optimal use of the space.