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Poll: ** The AMD VEGA Thread **

On or off the hype train?

  • (off) Train has derailed

    Votes: 207 39.2%
  • (on) Overcrowding, standing room only

    Votes: 100 18.9%
  • (never ever got on) Chinese escalator

    Votes: 221 41.9%

  • Total voters
    528
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Pmsl,best tripe

You call it tripe.

Yet offer no information that goes against what the article is saying.

I would love it to be true...

I've gotta agree, It's tripe, nothing but supposition creating a pie in the sky scenario.

I WANT TO BELIEVE! :D

Don't, you will get let down again.

I've gotta agree, as sad as that is.
There is deluded, and then there is that reddit post.

lol
Don't be mean, fiction writers have to start somewhere. Based on that reddit post I predict he could be the next J K Rowling.

Someone's been sprinkling fairy dust on his cornflakes.
 
I've gotta agree, It's tripe, nothing but supposition creating a pie in the sky scenario.

I think there's a lot of people still wondering where the performance had gone. Not just the fact that AMD have had a couple of years and should have done better, but from what we know of the hardware, it should be doing better than it is. Where is the performance? Are the features enabled? How much needs developer interaction, and how much needs the drivers to mature? These questions are still unanswered by AMD.
 
I think there's a lot of people still wondering where the performance had gone. Not just the fact that AMD have had a couple of years and should have done better, but from what we know of the hardware, it should be doing better than it is. Where is the performance? Are the features enabled? How much needs developer interaction, and how much needs the drivers to mature? These questions are still unanswered by AMD.

You're right there's a lot of unknowns still, What we do know is that the FE does not have all the gaming functionality working so we should see some sort of improvement for both the RX and the FE once it is running on the proper RX driver.
 
i am just a math guy.. but i dont see how else can this problem be addressed.
from a pipeline stage the occlusion culling can be done at a much earlier stage in the pipeline so that no additional efforts are spent on unnecessary primitives
.. this is what the vega is claiming will be done

A part they mentioned about very small renders is basically sounding like forced LOD scaling on everything. I've mentioned before games where the entire map has 100% LOD to stop accidental advantages in multiplayer I think it was, the map makers just didnt risk any scaling.
In this system hopefully they wont render the ornate candle stand (perhaps objects are already handled) or not the trellis detail on the wall to any detail because its behind 3 walls and is the size of a pin head(s) in view from the other side of the map.
 
A part they mentioned about very small renders is basically sounding like forced LOD scaling on everything. I've mentioned before games where the entire map has 100% LOD to stop accidental advantages in multiplayer I think it was, the map makers just didnt risk any scaling.
In this system hopefully they wont render the ornate candle stand (perhaps objects are already handled) or not the trellis detail on the wall to any detail because its behind 3 walls and is the size of a pin head(s) in view from the other side of the map.

They are just discarding tris that are so small they will never be part of any sampling, etc. there is no forced LOD scaling. This is the problem though with their approach to get the best gains in efficiency does probably require intimate knowledge of how the game works to avoid things like LOD scaling type issues especially if the developers are doing something creative with rendering to do things not normally possible (which is a big part of what game development is about).

You're right there's a lot of unknowns still, What we do know is that the FE does not have all the gaming functionality working so we should see some sort of improvement for both the RX and the FE once it is running on the proper RX driver.

I don't think we will see any magic performance gains - most of this stuff is basically already running the setup stages at like 80-100% utilisation and load (depending on how much they are waiting for the next stage to catch up if appropriate) but then the next stage is working at 100% load but lower actual utilisation to handle all the work it is being sent which then means the output from that is running at say 75% utilisation and/or load - by using some of this stuff to optimise the output from the setup engine you aren't creating more headroom in the setup engine, possibly a slight performance increase possible because the next stage can now handle more work - what you see is a massive reduction in the next stage's load when handling the same data because it is more optimised to what it actually needs = power reduction. This does mean you can then maybe turn up the output from the setup engine a bit to a higher quality level and increase visual fidelity to a level that previously the GPU would have choked while still running a bit more power efficient than before.
 
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Gonna be a bit pointless, not an amd design so going to be one of those ridiculously tall pcb's, plus they're going to have to do a hell of a lot of speed reduction on the core to make it even feasible. A 120mm rad would be overwhelmed with 2 of the full fat vega cores at aio speeds. I don't see it happening.

The article actually shows pictures of the ARES II, a 600w dual HD7970 card ASUS made a few years back (and IIRC it was the most powerful card on the planet until the 295X2 arrived). I wouldn't bet against the ASUS designers being able to work the same magic twice.
 
Why do we need leaks? AMD have told us what the performance is going to be, and often manufacturers own slides are the best case scenario.

To verify performance. AMD slides are to be taken with salt. We still know nothing credible regarding performance. No one has done an independent review yet.
 
To verify performance. AMD slides are to be taken with salt. We still know nothing credible regarding performance. No one has done an independent review yet.

Yup until we've seen the cards in the hands of a spread of reviewers and/or end users with proper drivers, etc. we know nothing for certain.
 
To verify performance. AMD slides are to be taken with salt. We still know nothing credible regarding performance. No one has done an independent review yet.
AMD slides are often incredibly vague/light on actual detail, and their meaning is often fiercely disputed :p
 
It is a slightly comedy situation that the card is released but its under NDA and no one is still quite sure of if every feature is going to fall flat or be some kind of quantum change to gaming pivotal in the next decade of development.

This description of mining would be inferior to 580 but still usable
 
Interesting article on Reddit, summarising a YouTube video on why we haven't seen the full performance of Vega yet:

https://www.reddit.com/r/Amd/comments/6rm3vy/vega_is_better_than_you_think/

https://www.youtube.com/watch?v=-G1nOztqWm0

*snip*

Primarily that it supports 2X Thread Throughput. This might seem minor, but I'm not sure people quite grasped (NVIDIA did, because they got the GTX 1080 Ti and Titan Xp out to market ASAP following the official announcement of said features) is this actually is perhaps THE most remarkable aspect of the Architecture. So... what does this mean?

In essence the ACE on GCN 1.0 to 4.0 has 4 Pipelines, each is 128-Bit Wide. This means it processes 64-Bit on the Rising Edge, and 64-Bit on the Falling Edge of a Clock Cycle. Now each CU (64 Stream Processors) is actually 16 SIMD (Single Instruction, Multiple Data / Arithmetic Logic Units) each SIMD Supports a Single 128-Bit Vector (4x 32-Bit Components, i.e. [X, Y, Z, W]) and because you can process each individual Component ... this is why it's denoted as 64 "Stream" Processors, because 4x16 = 64.

As I note, the ACE has 4 Pipelines that Process, 4x128-Bit Threads Per Clock. The Minimum Operation Time is 4 Clocks ... as such 4x4 = 16x 128-Bit Asynchronous Operations Per Clock (or 64x 32-Bit Operations Per Clock)

GCN 5.0 still has the same 4 Pipelines, but each is now 256-Bit Wide. This means it processes 128-Bit on the Riding Edge, and 128-Bit on the Falling Edge. Each CU is also now 16 SIMD that support a Single 256-Bit Vector or Double 128-Bit Vector or Quad 64-Bit Vector (4x 64-Bit, 8x 32-Bit, 16x 16-Bit).
*snip*​

Has AMD actually talked about the GCN 5.0 architect yet, or is this guy making assumptions?
 
Do you remember the days AMD had high end GPU's available. I don't either, but still VEGA will be a step in the right direction.

I'm yearning for an AMD GPU cos frankly I'm sick of having to remove Nvidia spyware every time I install a driver update (And yes this happens regardless of how you install the driver, don't believe run Autoruns. It will scare you).

Come on AMD hurry up !
 
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