There's no info about the clocks, IPC or performance (as expected, Apple's mouthpiece at Bloomberg won't reveal the good stuff
).
TSMC's N3 is going to be about 50% denser than the N5P in M2. That gives Apple a lot to work with, My expectation is that the normal M3 will have ~30 billion transistors, performance cores are going to get about 25% bigger, and we may get more E cores, but they'll stick to 4 P cores. I expect clocks to remain in the 3.5-4.0 GHz range and most improvements in CPU/GPU to come from better IPC.
I also expect M3 to be based on A17 uarch rather than A16 (M1 was based on A14, M2 on A15, A16 was basically a rebranded A15 as TSMC didn't deliver 3nm on time. I think they'll skip an M-series chip based on A16).
IPC wise not much is different, seems like all the potential gains will be from the 3nm node and extra cores.
These are not exclusive. Denser nodes allow bigger and wider cores (more transistors) in the same die space, which is how you achieve better IPC. Increasing clocks isn't the only way you can use denser nodes for better performance.
This usually is Apple's chip design approach, they focus on uarch improvements when they go to a denser node along they have modest clock increases, modest die size shrinks and significant transistor count increases. Then on future iterations when the node matures they increase clocks more aggressively while making their uarch more efficient to compensate. This is the opposite of Intel's old tik/tok approach.
