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AMD to unveil Zen 4 CPUs at CES 2022

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Just a point on cache, from what I heard it can't just be increased ad infinitum as it increases latency. Apparently there is a sweet spot between not having to go all the way back to system memory vs extra cache latency. Feel free to correct me if I have misunderstood it ;)
 
RavenXXX2 said:
hothardware.com

AMD Zen 4 EPYC Genoa Benchmark Leak Reveals A Massive L2 Cache Per Core Upgrade

A leaked benchmark of AMD's next-gen EPYC CPUs reveals a critical detail of the architectural upgrades in Zen 4.
hothardware.com hothardware.com
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That is interesting.

This caught my eye...

That's surely a big contributor to the 1126 single-core score, which in a vacuum would be rather poor, but considering we're talking about an early sample of a server processor here is actually pretty amazing. That's over half the single-core performance of one of AMD's current Zen 3 chips despite this CPU having a base clock of only 1.2 GHz.
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More than half the ST performance at 1.2Ghz, the base clock of Milan is 3.7Ghz, i've seen other articles say the IPC of Genoa (Zen 4) is 29% higher than Milan (Zen 3) I'm going to assume that is actually where MLID got his "30 to 40%" from.

If that is true AMD are not sandbagging Ryzen 7000 series performance details, they tied an anvil to its feet and threw it in the river.
 
humbug said:
The 6nm 64MB Cache on top of the 7nm 5800X3D is the same size as the 32MB cache in that chip, so 2X the capacity for the same area, this 6nm vs 7nm.

I think that shows just how old and out of date TSMC's 7nm actually is, even compared to their 6nm, Zen 4 is 5nm, a doubling of cache, L3 (64MB from 32MB) and L2 (4MB to 8MB) while the whole thing is still 10% smaller? yeah definitely doable, even the cores could be larger in transistor density terms.
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I though TSMC's 6nm vs 7nm was mainly about throughput since they use EUV?

And the reason the cache chiplet on the 5800X3D (and Milan-X) have better cache density is because for those wafers AMD are using cache specific libraries and TSMC are using a cache optimised process rather than a generic one.

It's no wonder that a cache chiplet gets far closer to the theoritical process density which is usually quoted for SRAM anyhow.
 
alec said:
If L3 cache doubling is true, Zen4 will be a beast
Would explain pedestrian gains in CB23 - it doesn't much care about extra cache
And explains why no game performance was shown. It would eat into 5800X3D sales
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This.

Maybe Zen 4 will perform ahead of the competition in games, but lose out in benchmarks.
 
Nowdays those benchmarks tools say nothing, 5800x3d is bad in CB, but tied in gaming with Intel best model. CPU architectures are much more complex today so we shouldn't judge it by single bench tool.
 
I get the feeling they've said enough to satisfy shareholders, that is factually correct, but it's what has not been said that will be more interesting.
 
It wouldn't surprise me if the locked 13th generation Intel CPUs don't release until Q1 2023, just like they did with the 12th gen. It's quite an off-putting strategy.
 
Never thought Zen4 is going to have AVX-512! I was under the impression that AVX-512 would take up lot of die spaces. Just also realized that AVX-512 comes in many different instructions that makes it AVX-512. For example, recent news is that Zen4 is only going to have BF16 and VNNI as part of AVX-512, while there are lot of other instructions found in RKL and many enthusiast Intel CPUs. AVX-512 is what helped behind RPCS3 emulation speedup. Is it only due to specific instruction in AVX-512 to make it happen and is it something Zen4's AVX-512 will excel at? It will be huge for emulation community. If it isn't and if AVX-512 instructions affect die size then that's probably why.

I need to find a list of instructions used in Genoa's AVX-512 and see if Genoa proved RPCS3 speedup. Oh! Nevermind, literally thought Genoa was released sometime ago already
 
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Ikana said:
Never thought Zen4 is going to have AVX-512! I was under the impression that AVX-512 would take up lot of die spaces. Just also realized that AVX-512 comes in many different instructions that makes it AVX-512. For example, recent news is that Zen4 is only going to have BF16 and VNNI as part of AVX-512, while there are lot of other instructions found in RKL and many enthusiast Intel CPUs. AVX-512 is what helped behind RPCS3 emulation speedup. Is it only due to specific instruction in AVX-512 to make it happen and is it something Zen4's AVX-512 will excel at? It will be huge for emulation community. If it isn't and if AVX-512 instructions affect die size then that's probably why.

I need to find a list of instructions used in Genoa's AVX-512 and see if Genoa proved RPCS3 speedup. Oh! Nevermind, literally thought Genoa was released sometime ago already
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AMD's AVX-512 is different to Intels. Robert confirmed that Zen4 does not use fixed function units for AVX-512 or any other AVX variants.

They take up lots of space on Intel CPUs because they are fixed function units that can't be used for anything else.

Just like AMD gpus, AMD doesn't believe in fixed function units for its CPU either
 
Grim5 said:
AMD's AVX-512 is different to Intels. Robert confirmed that Zen4 does not use fixed function units for AVX-512 or any other AVX variants.

They take up lots of space on Intel CPUs because they are fixed function units that can't be used for anything else.

Just like AMD gpus, AMD doesn't believe in fixed function units for its CPU either
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I think this is where AMD's Xilinx acquisition comes in, i'm sure he said it was an FPGA.

Speaking of acquisitions, AMD just bought out Pensando for $1.9 Billion.
 
Derbauer has done analysis of the physical attributes of the Zen4 CPU package and found that:

The IHS has a 30% smaller surface area compared to Zen3. The IHS is 1mm thicker than Zen3. The Chiplets inside are slightly smaller than Zen3. And lastly the Zen4 chiplets were moved closer to the edge of the IHS away from the center of the socket.


Put all of this together and immediately you should have alarm bells ringing, but Derbauer says don't worry yet wait til actual reviews are out we should not speculate that Zen4 will run hot, yet.
 
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I imagine it will run hot if running at the socket limit of 230w (if heavily overclocked or for future CPUs), but you can buy a good air cooler now for about £50-£60, so not such as big issue.

I don't expect Zen 4 CPUs at stock to run much hotter under load than Zen 3.
 
Grim5 said:
Derbauer has done analysis of the physical attributes of the Zen4 CPU package and found that:

The IHS has a 30% smaller surface area compared to Zen3. The IHS is 1mm thicker than Zen3. The Chiplets inside are slightly smaller than Zen3. And lastly the Zen4 chiplets were moved closer to the edge of the IHS away from the center of the socket.


Put all of this together and immediately you should have alarm bells ringing, but Derbauer says don't worry yet wait til actual reviews are out we should not speculate that Zen4 will run hot, yet.
Click to expand...

It was an interesting vide, at least I thought so :p

 
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