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*** AMD "Zen" thread (inc AM4/APU discussion) ***

I honestly don't see the problem with a lower end 2C/4T CPU - in that segment IGP performance will be very important for a lot of the sales AMD will make. The issue with the older APUs was:
1.)No upgrade path to higher performance CPUs
2.)The higher TDP variants could consume a decent amount more power than a Core i3
3.)ST performance was much lower
4.)The platform was starting to look dated
5.)The ones we could buy for DIY builds were behind Intel for media decoding duties(BR and SR have updated media functionality)

A 2C/4T Ryzen CPU will not have any of those disadvantages.

OFC,there is a possibility AMD might offer quad cores under £100 but these would need to be differentiated from the Ryzen 3 CPUs,so that might mean things like L3 cache being removed.

They certainly have their uses (I'm using the g4560) but it would be great to see 2C4T pushed so far down the product stack that it facilitates mainstream PC laptop/desktop to adopt 4/6 cores as a standard configuration.

Since Intel's pentium's start around £40 for 2C/2T+igp it would be great to see them introduce 2C/4T+igp (by default more capable igp) at that price point or lower.
 
They certainly have their uses (I'm using the g4560) but it would be great to see 2C4T pushed so far down the product stack that it facilitates mainstream PC laptop/desktop to adopt 4/6 cores as a standard configuration.

Since Intel's pentium's start around £40 for 2C/2T+igp it would be great to see them introduce 2C/4T+igp (by default more capable igp) at that price point or lower.

If you look at the first $100 quad core it was the Athlon II X4 620,so the Ryzen 3 1200 seems very close to that price point,so you could argue that Ryzen 3 is already at a mainstream price point!!

Having said that the L3 cache takes up 16mm2(plus the 44mm2 for a single CCX),so if they remove the L3 cache like previous AMD APUs,they could technically still have a quad core under £100.
 
If you look at the first $100 quad core it was the Athlon II X4 620,so the Ryzen 3 1200 seems very close to that price point,so you could argue that Ryzen 3 is already at a mainstream price point!!

Having said that the L3 cache takes up 16mm2(plus the 44mm2 for a single CCX),so if they remove the L3 cache like previous AMD APUs,they could technically still have a quad core under £100.

At 44mm2 with the L3 it seems pretty small already and you have to wonder if it would be worth removing it and reworking inter-core communication through L2 and I'd have thought the large L3 ought to be useful for an APU with higher demands on memory controller. Kaveri on FM2+ came with 4MB L2 - which I recall L2 takes up more space on a MB per mm2 basis than L3 (not sure on the exact space difference per MB) and lower end quad core models launched under £100 according to pricespy (~£70 for the A8-7600 https://pricespy.co.uk/product.php?pu=2755150).
 
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Gigabyte Gaming B350 Gaming 3
1700
Team Group Dark 2x4gb.
No overclock

Failing to boot, 4 diagnostic LEDs just cycle from RAM back to CPU and fails to post. Tried both sticks of ram in all 4 slots to no avail.

Dead RAM?

Well definitely not RAM related. Bought a Corsair 16GB kit a couple of hours ago and get the same result with either stick in any slot
 
If you look at the first $100 quad core it was the Athlon II X4 620,so the Ryzen 3 1200 seems very close to that price point,so you could argue that Ryzen 3 is already at a mainstream price point!!

Having said that the L3 cache takes up 16mm2(plus the 44mm2 for a single CCX),so if they remove the L3 cache like previous AMD APUs,they could technically still have a quad core under £100.

At 44mm2 with the L3 it seems pretty small already and you have to wonder if it would be worth removing it and reworking inter-core communication through L2 and I'd have thought the large L3 ought to be useful for an APU with higher demands on memory controller. Kaveri on FM2+ came with 4MB L2 - which I recall L2 takes up more space on a MB per mm2 basis than L3 (not sure on the exact space difference per MB) and lower end quad core models launched under £100 according to pricespy (~£70 for the A8-7600 https://pricespy.co.uk/product.php?pu=2755150).

Just some hypothetical messing around with quick back of the envelope calc's for Zen total cache options for APU (although in no way of taking into account the many implications of different L2/L3 arrangements)

L2 1.5 mm2 for 512KB-> 3 mm2/MB
L3 16 mm2 for 8MB -> 2 mm2/MB

Options for 4C CCX

1.) 512K L2 x4 + 8MB L3 = 10MB on-die cache = 22 mm2/CCX
2.) 512K L2 x4 + 4MB L3 = 6MB on-die cache = 14 mm2/CCX

Without L3 and L2 is shared:
3.) 1MB L2 x4 + NO L3 = 4MB on-die cache = 12 mm2/CCX
4.) 1.5MB L2 x4 + NO L3 = 6MB on-die cache = 18 mm2/CCX
5.) 2MB L2 x4 + NO L3 = 8MB on-die cache = 24 mm2/CCX

I could see them leaving the CCX cache sizes as is for the APU or at least retaining a smaller L3 cache. In comparison to the existing CCX in option 1, option 3 seems a no go as you save 45% the die area dedicated to cache to lose 60% cache capacity (and a massive reduction in dedicated cache p/core, accessible cache p/core and contention with 3 other cores for access to fetching any data not in L1). And looking at option 4 vs 1 you increase area dedicated for cache by 22% and gain 66% cache size (and gain much more p/core dedicated cache with no contention to search and fetch from the next level of cache with a private L2).

They could reduce the L3 to 6MB /4MB or less but I would have thought that can't come without some adverse effect on CPU performance especially with the igp contending for ram access and potentially using a lot of bandwidth. But then again the typical use of these chips isn't necessarily going to be that demanding.

We'll find out when we found out I suppose. Ultimately we are talking about saving a cpl of mm2 (~10 max maybe?) on a chip that I guess wont be smaller than 150mm2 (4C die variant). Could make much more sense for a 2C die but the area saving is halved so it would probably be for power reasons.
 
I bet you there will be 2 core ryzens for well under £100.....but I bet you they will be failed silicon with only two working cores (makes most sense - amd made ryzen to avoid having to fab a range of different cores) ... However as ryzen yields are so good they simply don't have enough to fill value segments when they can sell them for more.

All the returned and or rubbish yields will be turned into the 2c/4t offerings.
 
Just some hypothetical messing around with quick back of the envelope calc's for Zen total cache options for APU (although in no way of taking into account the many implications of different L2/L3 arrangements)

L2 1.5 mm2 for 512KB-> 3 mm2/MB
L3 16 mm2 for 8MB -> 2 mm2/MB

Options for 4C CCX

1.) 512K L2 x4 + 8MB L3 = 10MB on-die cache = 22 mm2/CCX
2.) 512K L2 x4 + 4MB L3 = 6MB on-die cache = 14 mm2/CCX

Without L3 and L2 is shared:
3.) 1MB L2 x4 + NO L3 = 4MB on-die cache = 12 mm2/CCX
4.) 1.5MB L2 x4 + NO L3 = 6MB on-die cache = 18 mm2/CCX
5.) 2MB L2 x4 + NO L3 = 8MB on-die cache = 24 mm2/CCX

I could see them leaving the CCX cache sizes as is for the APU or at least retaining a smaller L3 cache. In comparison to the existing CCX in option 1, option 3 seems a no go as you save 45% the die area dedicated to cache to lose 60% cache capacity (and a massive reduction in dedicated cache p/core, accessible cache p/core and contention with 3 other cores for access to fetching any data not in L1). And looking at option 4 vs 1 you increase area dedicated for cache by 22% and gain 66% cache size (and gain much more p/core dedicated cache with no contention to search and fetch from the next level of cache with a private L2).

They could reduce the L3 to 6MB /4MB or less but I would have thought that can't come without some adverse effect on CPU performance especially with the igp contending for ram access and potentially using a lot of bandwidth. But then again the typical use of these chips isn't necessarily going to be that demanding.

We'll find out when we found out I suppose. Ultimately we are talking about saving a cpl of mm2 (~10 max maybe?) on a chip that I guess wont be smaller than 150mm2 (4C die variant). Could make much more sense for a 2C die but the area saving is halved so it would probably be for power reasons.

Going from prior history AMD have tended to drop the L3 cache from all their APUs. However,for the sub £100 market have a 2C/4T die might make more sense as I mentioned before that should be under 100mm2.

They could make the APU have L3 cache like the CPUs,but it makes me wonder how big it would if they want to sell sub £100 CPUs too at a decent profit margin,unless they have two different chips like with the current APUs,ie,separate 2C and 4C chips.


States private vid for me Cat .

Second one works though

It seems Joker might have pulled the video!!
 
Apologies if this has no doubt been answered before, but is there much difference between B350 and X370 chipsets? I'm looking to get a Asrock ITX board. It's going to be used with a 1700 and probably be left at stock or maybe a very mild overclock (it's going in my non gaming PC, so already massively overkill :p ). I'm thinking B350 as it's a bit cheaper, although would get the X370 version if it's much better.
 
Apologies if this has no doubt been answered before, but is there much difference between B350 and X370 chipsets? I'm looking to get a Asrock ITX board. It's going to be used with a 1700 and probably be left at stock or maybe a very mild overclock (it's going in my non gaming PC, so already massively overkill :p ). I'm thinking B350 as it's a bit cheaper, although would get the X370 version if it's much better.

A B350 is fine for your described needs. The main gain with an X370 is being able to SLI or Crossfire. As your not gaming that's of no interest to you.
 
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