So there can be limits on what active and passive devices you are allowed to use on silicon by a foundry, you also have to pay more for the mask set, in my area Analog RF silicon design, as an example we might have a lot of on chip cap using a finger mom structure (be careful searching that in google
) You use a very small width and spacing of tracks for fringing capacitance normally but for Auto or high voltage you have to increase that spacing which reduces the cap effectivness this means you need more area for same capacitance which depending on what you are doing can have a significant impact.
On the packaging side where you can use nice tight pitch on copper pillars for example in mobile when you say automotive most packaging houses go nope and want to quadruple it, also where you could have used a number of RDL layers for reliability it is recommended to use less, of course you can pay loads more to alleviate these sort of restrictions but who does that
and unless you are buying a bajillion many companies aren't even interested.
You also have to factor in supporting the part a lot longer than throw away consumer gear.
Loads of things like this get implemented and costed accordingly, for some one slapping a device on a PCB it is just a slight change to a part number.