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. If you leave it sync in bios and start upping the fsb from 200 you'll see the pci-e bus climb until you get to 265 where the pci-e will be at 132. Move to 266 and pci-e bus goes back to 100. At 300fsb sync then your pci-e bus will be 112, so 290fsb and pci-e 109 are really a natural pairing. 
CS||nuTs said:Easy no offense mate but you need to get out more![]()



Big.Wayne said:Hmmm this may explain my high temps!
![]()
Would seem my E2140 chip is concave as you can see in the photo there was no contact whatsoever between the heatsink and the centre of the IHS?
I refitted it this time using the pea-blob method and will leave that for a week or so but I think this CPu may need lapping lol!![]()
CS||nuTs said:Easy no offense mate but you need to get out more![]()
Big.Wayne said:Hmmm this may explain my high temps!
Would seem my E2140 chip is concave as you can see in the photo there was no contact whatsoever between the heatsink and the centre of the IHS?
I refitted it this time using the pea-blob method and will leave that for a week or so but I think this CPu may need lapping lol!![]()
easyrider said:why don't you just put a thin line down the centre of the IHS.
Thats the correct method to apply AS5 on C2D
steve258 said:The line-down-the-middle method is suggested in the AS5 manual online.
Munky1080 said:Good job Camelot, welcome to the cheap C2D+AGP+DDR club! It's a nice place to be![]()


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