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AMD Zen 2 (Ryzen 3000) - *** NO COMPETITOR HINTING ***

WikiChip has published their take on AMD’s upcoming Zen 2
https://fuse.wikichip.org/news/1815/amd-discloses-initial-zen-2-details/

Something to clarify ;)

I/O Die
There is a lot of mystery surrounding the capabilities of the I/O die and AMD’s plan for the future. By moving all the “redundant components”, such as the I/O and southbridge, from the compute die to the I/O die, AMD has opened up their design to some intriguing possibilities. Since all the controls can be found in the centralized I/O die, it becomes possible to swap out the compute dies with other types of logic such an FPGA (e.g., from Xilinx) or a GPU. In Naples, this would have meant sacrificing some of the I/O or memory but with Rome, this is no longer the case. AMD has not announced any such plans, but the option is there.

 
Whats got me concerned at the moment is esxi compatibility.

The board I Was looking at is the asrock b450 pro.

comes with onboard realtek nic, 4 native sata ports and 2 asmedia sata ports.

Out of the box the nic and asmedia ports wont work in esxi although I think they will work if I customise an esxi install to enable the drivers, I also have a pcie intel nic.
Apparently the b450 chipset only has 2 native sata ports O_o (not sure what amd were thinking), but also apparently the 2 native sata express ports can be repurposed to standard sata and this is what most board vendors have been doing hence the 4 ports on this board, but some people have been reporting the repurposed ports are problematic.
Eventually I will be moving from esxi to proxmox at which point I think I will have no concerns. I am sick of esxi and its very limited hardware support, but I will need to stick with esxi for a short time tho.

The ryzen SMT issues with esxi (another very odd problem limited to esxi), wont be an issue as I am buying a 2600, which has 12 threads and it only affects zen processors with at least 16 threads.
 
So it looks like end of May/Early June for Ryzen 3000 series. Plenty of time to save up!
 
https://wccftech.com/amd-ryzen-3000-cpus-x570-chipset-and-pcie-gen-4-support/
AMD Ryzen 3000 Series To Feature Support on X570 Chipset Based AM4 Boards – Allegedely The First Platform To Support PCIe 4.0, Launching at Computex 2019

Im hoping as far as RyZen 4000 incl, will be supported in our current socket, they did say that DDR5 will become available in 2020, but its still possible for RyZen to support DDR4 and DDR5

Hope you voted at the bottom of that link you provided, the results are quite funny !!!

https://wccftech.com/amd-ryzen-3000-cpus-x570-chipset-and-pcie-gen-4-support/
 
The results from the poll are very nice for AMD :)

TBH, I don't wait DDR5, its timings are so loose, that at least a couple more years after its first market introduction, they won't offer anything substantial over the fastest DDR4 that we have today.
Only that a new memory controller has always been a pain in the ass for AMD...
As for AM4, yes, 4 generations of CPUs on the same socket is great!
 
The results from the poll are very nice for AMD :)

TBH, I don't wait DDR5, its timings are so loose, that at least a couple more years after its first market introduction, they won't offer anything substantial over the fastest DDR4 that we have today.
Only that a new memory controller has always been a pain in the ass for AMD...
As for AM4, yes, 4 generations of CPUs on the same socket is great!

Yep, i defo will not be an early adopter of DDR5 either. I was an early adopter of DDR2 and DDR3, a big mistake that i won't make again. Needless to say i was a late adopter to DDR4................one of the best decisions i have made i think.
 
Yep, i defo will not be an early adopter of DDR5 either. I was an early adopter of DDR2 and DDR3, a big mistake that i won't make again. Needless to say i was a late adopter to DDR4................one of the best decisions i have made i think.

I am expecting HBM2/HBM3 to be main RAM solution soon. Imagine all these notebooks with a nice APU of Zen 2 + Navi + 16GB HBM3 (10-12GB for RAM and 4-6GB for VRAM).
 
From what I've read, PCIe 4.0 is likely to be very short lived and mostly skipped over with PCIe 5.0 coming relatively soon.... What does that mean for anyone like me considering a move to Zen when the new chips come out?

I'm assuming that if the GPU's very quickly transit 4.0 and jump to 5.0 by some point in 2020 (so, perhaps even the next gen of NVidia cards?) that when plugging them in to a PCIe 4.0 slot you'll still have so much excess bandwidth that it won't really make the slightest jot of difference to current and near future GPU's or NVME storage?
 
From what I've read, PCIe 4.0 is likely to be very short lived and mostly skipped over with PCIe 5.0 coming relatively soon.... What does that mean for anyone like me considering a move to Zen when the new chips come out?

I'm assuming that if the GPU's very quickly transit 4.0 and jump to 5.0 by some point in 2020 (so, perhaps even the next gen of NVidia cards?) that when plugging them in to a PCIe 4.0 slot you'll still have so much excess bandwidth that it won't really make the slightest jot of difference?

Nope, 4.0 was introduced last year with products on it coming next year. 5.0 is still in draft phase and the earliest I would expect products, is 2021.
 
I feel the limitations is not how fast each lane is, but the total amount of bandwidth provided to the chipset.

Why do we keep seeing silly things like if you use this m.2 slot you lose 2 sata ports.

usb3 shares with nic etc.

Instead of pcie4 I would rather see a pcie3 board where not a single slot or feature on the board has to share bandwidth with something else.
 
I feel the limitations is not how fast each lane is, but the total amount of bandwidth provided to the chipset.

Why do we keep seeing silly things like if you use this m.2 slot you lose 2 sata ports.

usb3 shares with nic etc.

Instead of pcie4 I would rather see a pcie3 board where not a single slot or feature on the board has to share bandwidth with something else.

Ain't that down to what the lanes the CPU has though? That's why the Eypc chips are good for Server due to PCI lanes that they have for things like multiple NVME, 10gibt ect
 
Ain't that down to what the lanes the CPU has though? That's why the Eypc chips are good for Server due to PCI lanes that they have for things like multiple NVME, 10gibt ect

Yup it is, and 4 more PCI-e lanes from the CPU is all it would take for what @chrcoluk said to stop happening, and have the 2nd M.2 drive running at full speed like the first one without loosing anything (sharing lanes), I was hoping they would do this with Zen+, maybe it was too late to change it and they'll do it with Zen2.

At the moment we have 24, x16 for the GPU, splits to x8/x8 if using 2 GPU's, x4 for the 1st nvme drive, and the other x4 are dedicated to the chipset

Up it to 28 and it would be more like this: x16 for the GPU, (x8x8 SLi/CF), x4 for the 1st nvme slot, x4 for the 2nd nvme slot, final x4 dedicated to the chipset.
 
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