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AMD Zen 2 (Ryzen 3000) - *** NO COMPETITOR HINTING ***

People were saying this exact sort of thing when Ryzen was mostly rumours. People were incredulous to the possibility of AMD releasing an 8 core 16 thread CPU for any less than Intel's current prices. Yet they released at less than half the price.
If it goes for the prices there I think they are HIGHLY possible. Especialy 8c 16t cpu. That would be only 1 CCX not 2 so cheap as chips to produce also I think it will be best gaming option and highest speed on ddr and core itself. Less problems with GLUE tm when only 1ccx is used
 
If it goes for the prices there I think they are HIGHLY possible. Especialy 8c 16t cpu. That would be only 1 CCX not 2 so cheap as chips to produce also I think it will be best gaming option and highest speed on ddr and core itself. Less problems with GLUE tm when only 1ccx is used

If it follows Epyc design, as you would expect, you get more glue as the memory controllers are off-die... Pretty sure Zen 3 will be an improvement though, question is how much and how hard are Intel going to spin :p
 
If it follows Epyc design, as you would expect, you get more glue as the memory controllers are off-die... Pretty sure Zen 3 will be an improvement though, question is how much and how hard are Intel going to spin :p
But should be better than RAMBUS IMC in zen and zen+
 
If it follows Epyc design, as you would expect, you get more glue as the memory controllers are off-die... Pretty sure Zen 3 will be an improvement though, question is how much and how hard are Intel going to spin :p

I think the guys at Intel sniff glue on the daily.
 
If it goes for the prices there I think they are HIGHLY possible. Especialy 8c 16t cpu. That would be only 1 CCX not 2 so cheap as chips to produce also I think it will be best gaming option and highest speed on ddr and core itself. Less problems with GLUE tm when only 1ccx is used

It won't be 1 chiplet, it'll be 2 chiplets with 4 cores disabled in each. All of the fully-functioning, 8-core chiplets will be used in EPYC Rome. This also precludes a 16-core Ryzen 3000 too, unless AMD do a limited Black Edition and charge a hefty whack for it to recoup revenue lost by not making an EPYC Rome.

This of course assumes Ryzen 3000 will have the same independent I/O controller design as EPYC.
 
^^ I don't see them treading on TR with desktop Ryzen, 8 cores are plenty for DT for a while yet. And it'll be either one core chiplet and one IO die or two chiplet die with fused cores and the IO die, unless they design a desktop specific die, which goes against the Zen philosophy so far...
 
That’s not the case, U2 is M2 with a cable and works fine. Just like you can extend PCI-E slots with risers.

M2 has been adopted simply because it was already being widely used in laptops, so drives were easily available. The M2 format needs a good chunk of PCB space (unless mounted vertically) so they’re bunged anywhere they can possibly fit on already crammed mobos, hence the use of the back of the board, between the PCI-E slots etc.

You could bung a whole load of U2 ports on a mobo but nobody does as mainstream U2 SSDs are rare and the cables are expensive and relatively bulky. Plus mainstream CPUs are already burning through their PCI-E lanes as it is.

This is my issue.

These type of slots work well in confined spaces, like laptops and NUC devices.

But they horrible in a desktop pc, awkward to access, drives get overheated and as you mentioned limited PCB space. I think pci-e NVME drives are far superior in that the slots and space already exist, cooling will be better, and easier installation. But the problem is also as you said that the drive manufacturers would need to make the drives in pcie format when they already make in this format.

So to me a compromise solution could be used. You buy a pcie card where you attach the m.2 drive to. Also this means the valuable lanes can be fully routed to pcie slots instead of shared to m.2 ports that most people wont use.

https://en.wikipedia.org/wiki/U.2

Yeah U2 is deffo superior to m.2 as well, they basically chose the worst solution out of the 3 for me.
 
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Ill put some coal in to the Hype Train :D

intel are dead and buried with that line up. 5ghz cpus, tons of cores, everyone is a winner. Probably explains the crazy intel 9 pricing, intel going out with a last bang.
 
So you link to a Youtube video, with the absolutely worst sort of guessing using an "unnamed source" to provide the information which if things don't turn out as stated he just states he was mislead by the so called source etc. His technical knowledge with regards to power delivery is also terrible, and lends zero credibility towards his information. Why do people even remotely believe this sort of tripe? :rolleyes:

Is he GavINTEL in disguise sent to troll AMD :p
 
It won't be 1 chiplet, it'll be 2 chiplets with 4 cores disabled in each. All of the fully-functioning, 8-core chiplets will be used in EPYC Rome. This also precludes a 16-core Ryzen 3000 too, unless AMD do a limited Black Edition and charge a hefty whack for it to recoup revenue lost by not making an EPYC Rome.

This of course assumes Ryzen 3000 will have the same independent I/O controller design as EPYC.
I hope there is Black edition top clocker. I paid extra 80 pounds for silicone lottery 2700x for extra 100mhz. I'm willing to pay extra 100 over normal chip for better clocker.

GIEV BLACK EDITION !!!!
 
Just seen what everyone was talking about, the OP of the content is on my ignore list.

It's a photo of an email :rolleyes:. LOL :D Brilliant!

Tempted to re-create and make it 6GHz+ :D
 
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3700X is the best price chip imo, the 3800X black is a ego price premium, amd took lessons from intel LOL, but at least its double the cores of the 9900k AND cheaper.
 
So how does that work? 8 core has lower clocks than 16, which in turn has lower than 32cores :D and then 48 clocked the highest :D nice list
 
It won't be 1 chiplet, it'll be 2 chiplets with 4 cores disabled in each. All of the fully-functioning, 8-core chiplets will be used in EPYC Rome. This also precludes a 16-core Ryzen 3000 too, unless AMD do a limited Black Edition and charge a hefty whack for it to recoup revenue lost by not making an EPYC Rome.

This of course assumes Ryzen 3000 will have the same independent I/O controller design as EPYC.
Two separate cut down single CCX chips and separate I/O chip would be serious double mess for desktop performance:
  • Jump between two CCXes has performance penalty for communication between threads already in single die.
    So having cores on two separate dies would be even bigger challenge for minimizing that penalty.
  • Also moving memory controller to separate I/O die is challenge to core-IMC latency and hence memory latency...
    Which is very important in desktop use and already currently behind Intel!
Neither of these things is big deal in servers running lots of completely independent threads/workloads, without communication between them.
And more dependant on memory bandwidth than best latency.
But do both on desktop and it would be lots of work to prevent gaming performance from dropping!

Separate core chiplet and I/O die would be challenge enough.
Putting those crippled and halved CPU core chiplets to some console MCM would be more sensible, than giving Intel "free ammunition" to use against AMD on desktop.
 
We'll see how Ryzen 3000 turns out then @EsaT . Right now all we've seen from Zen 2 is EPYC Rome and its multiple chiplets + I/O die construction, we don't know if that's the route AMD are taking with Ryzen.
 
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Ill put some coal in to the Hype Train :D

If this turns out to be true, id defo pay £500 for that black edition 3800X, 16 cores, 32 threads boosting to 5ghz nearly...……..Mommy, may I ? :eek:

As for fake, pretty sure it is, no one knows yet except for AMD.
 
If this turns out to be true, id defo pay £500 for that black edition 3800X, 16 cores, 32 threads boosting to 5ghz nearly...……..Mommy, may I ? :eek:

As for fake, pretty sure it is, no one knows yet except for AMD.

There are still 7 months in which some characteristics of the process will be improved, so AMD can't know so early neither the frequencies which should be at the to-be-yet-decided phase, nor the pricing.
 
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